公开(公告)号：JPS61222217A

公开(公告)日：1986-10-02

申请号：JP6432885

申请日：1985-03-28

Applicant: SONY CORP

Inventor： AKIMOTO KATSUHIRO ,  DOUSEN MASASHI ,  ARAI MICHIO

IPC: H01L21/203

Abstract: PURPOSE:To execute growth at a low cell temperature without reducing the growing speed, by employing a plural of cells for a molecular beam of at least one of elements constituting compound semiconductor. CONSTITUTION:A plural of cells are employed for a molecular beam of at least one of elements constituting compound semiconductor. For example, an MBE apparatus which has several Ga cells 2 and several As cells 3 in a growth chamber evacuated into very high vacuum ( -10 Torr) and which has an introducing inlet 4 for H2 gas, is employed. Under a condition in which H2 gas with about (2-5)X10 Torr is being introduced preliminarily in the growth chamber 1, heating every cell 2, 3 results in Ga and As molecular beams, which are bumped to a substrate 5 being heated preliminarily to a given temperature, thus to epitaxial-grow GaAs.

公开(公告)号：JPS56145200A

公开(公告)日：1981-11-11

申请号：JP4966180

申请日：1980-04-15

Applicant: SONY CORP

Inventor： DOUSEN MASASHI ,  KATOU YOUJI ,  MORISANE KENJI

IPC: C30B25/02 ,  C01G28/00 ,  C30B29/40 ,  H01L21/205

Abstract: PURPOSE:The base body is placed downstream and a metal of III group in the periodic table, upperstream in regard to the reaction gas flow in the reaction tube and a chlorinated hydrocarbon is sent together with a carrier gas from the outside of the reaction tube near the above metal and another gas containing a V-group metal is fed between the base body and the III-group metal, thus growing a semiconductor of a compound of elements in both groups of III and V. CONSTITUTION:For example, in the reaction tube of quartz 1 in which a reaction gas is made to flow, a base 3 such as GaAs base is placed downstream and a Ga source, i.e., at least one of III-group metal sources 2, is placed upperstream. A chlorinated hydrocarbon, which is liquid at room temperature, such as trichloroethylene is sent from the outside of the reactor together with a carrier gas near to the III-group metal source and another gas 6 containing at least one of V-group metal such as AsH3 is fed between the base body 3 and the III-group metal source. Trichloroethane reacts with Ga to form GaCl, which reacts with the As formed by the pyrolysis of AsH3 to deposit GaAs on the base body 3.

公开(公告)号：JPS60116172A

公开(公告)日：1985-06-22

申请号：JP22484383

申请日：1983-11-29

Applicant: SONY CORP

Inventor： TAIRA KENICHI ,  WADA MASARU ,  KATOU YOUJI ,  DOUSEN MASASHI

IPC: H01L29/808 ,  H01L21/331 ,  H01L21/337 ,  H01L29/20 ,  H01L29/72 ,  H01L29/73

Abstract: PURPOSE:To perform a bipolar operation by forming the first and second regions in semi-insulating regions, and selectively providing the other third conductive type region on the semiconductor between the both the first and the second regions, thereby applying a forward bias between the third and the first regions, and forming an imaginary base region under the third region. CONSTITUTION:P type impurity is doped in high density on the main surface 10a of a semi-insulating semiconductor 10 to form a semiconductor layer 11, and a base electrode 12 is selectively coated on the layer 11. With the electrode 12 as a mask an N type impurity ions different from the layer 11 are implanted from the main surface side of the semiconductor 10, thereby forming the first and second regions 13, 14 as emitter and collector regions. Then, the layer 11 is selectively etched to set the remaining layer 11 as the third region. Emitter and collector electrodes 15, 16 are coated on the regions 13, 14, respectively. A forward bias potential is applied between the region 13 and the layer 11, an imaginary base region due to the implantation of the majority carrier from the layer 11 is formed in the semiconductor 10 under the layer 11, thereby performing a bipolar transistor operation.

公开(公告)号：JPS5646524A

公开(公告)日：1981-04-27

申请号：JP12304579

申请日：1979-09-25

Applicant: SONY CORP

Inventor： KATOU YOUJI ,  DOUSEN MASASHI

IPC: C23C16/30 ,  H01L21/205

Abstract: PURPOSE:To increase the growing speed of a compound semiconductor containing As by sending As chloride into a reacting tube, and sending the other As separately into the gaseous phase growing atmosphere. CONSTITUTION:In a reacting tube 1, are arranged a Ga source 2 for the constituent material of a compound semiconductor to be formed by the gaseous material of a compound semiconductor to be formed by the gaseous-phase growth, and a substrate 3 to be grown in a gaseous phase, e.g., a GaAs substrate. The Ga source 2 is positioned at a high temperature portion and the substrate 3 is positioned at a low temperature portion. Then, AsCl3 is carried to the vicinity of the Ga source 2 by a carrier gas H2. At the same time, AsH3 is sent into a gaseous phase growing atmosphere for the substrate 3. A supply hole 4 for supplying said AsH3 into a reacting tube 1 is located in the vicinity of the substrate 3, and the portion A which is on the side to the Ga source 2 is recommendable. In this method, a GaAs compound semiconductor layer is deposited and grown on the substrate 3 at a quick growing speed.

公开(公告)号：JPS55150288A

公开(公告)日：1980-11-22

申请号：JP5744379

申请日：1979-05-10

Applicant: SONY CORP

Inventor： DOUSEN MASASHI ,  AYABE MASAAKI

IPC: H01L21/265 ,  H01L21/208 ,  H01S5/00 ,  H01S5/10 ,  H01S5/16 ,  H01S5/223

Abstract: PURPOSE:To obtain simply a high output laser by forming different active layer light emitting unit and end depth position via predetermined ruggedness formed on the main surface. CONSTITUTION:A linear groove 19a and a rectangular groove 19b are formed as predetermined on an n-type GaAs substrate 11, an n-type Ga1-X AlXAs 13, a p- type GaAs active layer 14, a p-type Ga1-XAlXAs 14, a p-type GaAs 15 are sequentially laminated with an electrode 18, and cut at predetermined line. According to this configuration, the layers 12 to 14 are particularly increased in thickness when growing them on the narrow groove 19a, and the active layer 13 is flat on the surface, but the layer 13 is grown with the groove 19b at the wise groove 19b, while it is grown obliquely at the end surface 17. Therefore, the laser light from the active layer 13 is introduced through the enclosed layer 14 on the end 13a, but the layer 14 has larger band gap than the layer 13, and the light passed through the layer 14 is accordingly remarkably decreased to reduce the heat at the end surface. Accordingly, it can conduct high output operation.

公开(公告)号：JPS60117774A

公开(公告)日：1985-06-25

申请号：JP22586283

申请日：1983-11-30

Applicant: SONY CORP

Inventor： TAIRA KENICHI ,  WADA MASARU ,  DOUSEN MASASHI ,  KATOU YOUJI

IPC: H01L29/808 ,  H01L21/331 ,  H01L21/337 ,  H01L29/20 ,  H01L29/72 ,  H01L29/73

Abstract: PURPOSE:To obtain a semiconductor device, characterized by a structure similar to a normally OFF type J-FET, high radiowave amplification factor, and bipolar transistor operation having excellent high speed operation property, by forming a current path for injected carrier in a low impurity concentration region other than a region having high impurity concentration. CONSTITUTION:For example, a GaAs III-V group compound semiconductor substrate 11, which is semi-insulating and has high resistance, is provided. For example, a first, N type, relatively low-impurity-concentration region, 12 is formed on the side of one main surface 11a. On this region, P type impurities are selectively introduced, and a second region 13, whose impurity concentration is higher than the first region, is formed. Third and fourth high-impurity-concentration regions 14 and 15 having the same conductive type as that of the region 12 are formed on both sides of the region 13 so that they are connected to the first region 12, as required. Emitter, collector, and base electrodes 16-18 ar deposited on the regions 14, 15, and 13 in a ohmic mode. The electrodes are extraced from these parts. Thus wiring becomes easy, and the constitution of the integrated circuit becomes advantageous.

公开(公告)号：JPS60116171A

公开(公告)日：1985-06-22

申请号：JP22484283

申请日：1983-11-29

Applicant: SONY CORP

Inventor： TAIRA KENICHI ,  WADA MASARU ,  DOUSEN MASASHI ,  KATOU YOUJI

IPC: H01L29/808 ,  H01L21/331 ,  H01L21/337 ,  H01L29/20 ,  H01L29/72 ,  H01L29/73

Abstract: PURPOSE:To reduce the irregularity in the characteristics by forming the first, second and third semi-insulating regions, and providing means for controlling the implantation of carrier to the semiconductor, thereby increasing the current amplification factor at the operating time of a bipolar transistor. CONSTITUTION:The first and second regions 11, 12 to become emitter and collector regions are formed at the prescribed interval on a semi-insulating semiconductor 10, and the third different conductive type region 13 is formed between the regions 11 and 12 at the prescribed interval. Emitter, collector and base electrodes 14, 15, 16 are formed on the regions 11, 12, 13, respectively. A forward bias is applied between the regions 11 and 13 to form an imaginary base region 18 due to the implanting of the carrier of majority from the region 13 on a high resistance region 17 of the semiconductor 10 under the region 13. An implantation control region 19 for controlling the implanting of the carrier to the semiconductor 10 is provided between the regions 11 and 12. The current amplification factor at the time of operating the bipolar transistor is increased to reduce the irregularity in the characteristics.

公开(公告)号：JPS6098682A

公开(公告)日：1985-06-01

申请号：JP20624583

申请日：1983-11-02

Applicant: SONY CORP

Inventor： DOUSEN MASASHI ,  ARAI MICHIO

IPC: H01L29/808 ,  H01L21/337 ,  H01L29/80

Abstract: PURPOSE:To reduce the side wall capacitance by a method wherein the second semiconductor layer having a larger energy gap than the first semiconductor layer of the first conductivity type is provided thereon, and a semiconductor layer of the second conductivity type is provided in the second semiconductor layer. CONSTITUTION:The first N type semiconductor layer 5 and the second N type semiconductor layer 6 are formed on a GaAs compound semiconductor substrate 4. The layer 6 is made up of a semiconductor layer having an energy gap larger than the layer 5. The gate region 7 is formed by introduction of a P type impurity to the layer 6. This manner reduces the capacitance per unit area in the side wall section ja.

公开(公告)号：JPS60116170A

公开(公告)日：1985-06-22

申请号：JP22484183

申请日：1983-11-29

Applicant: SONY CORP

Inventor： WADA MASARU ,  TAIRA KENICHI ,  DOUSEN MASASHI ,  KATOU YOUJI

IPC: H01L29/808 ,  H01L21/331 ,  H01L21/337 ,  H01L29/20 ,  H01L29/72 ,  H01L29/73

Abstract: PURPOSE:To perform the operation of a bipolar transistor by forming the other conductive type third region between the emitter and the collector regions of a semiconductor substrate, and implanting the majority of carrier in an insulating semiconductor region under the third region, thereby forming an imaginary base region in the third region. CONSTITUTION:The first and second regions 11, 12 are formed by ion implanting at the prescribed interval as n type emitter and collector regions in a semi-insulating semiconductor 10. The third p type high impurity density regions 13 is formed by ion implanting or diffusing on the plane surface between the first and the second regions 11 and 12. Emitter, collector and base electrodes 14, 15, 16 are formed on the regions 11, 12, 13, respectively. A forward bias is applied between the regions 11 and 13, and a reverse bias is applied between the regions 13 and 12. The holes of the majority of carrier from the region 13 are formed with an imaginary base region 18 by implanting to the high resistance region 17 of the conductor 10 under the region 13, thereby operating as lateral structure n-p-n type bipolar transistor.

公开(公告)号：JPS58201386A

公开(公告)日：1983-11-24

申请号：JP8444282

申请日：1982-05-19

Applicant: Sony Corp

Inventor： MATSUDA OSAMU ,  AYABE MASAAKI ,  DOUSEN MASASHI

IPC: H01S5/00 ,  H01S5/20 ,  H01S5/223 ,  H01S5/24 ,  H01S5/323

CPC classification number: H01S5/2059 ,  H01S5/223 ,  H01S5/2232 ,  H01S5/2237 ,  H01S5/24 ,  H01S5/32308

Abstract: PURPOSE:To reduce the temperature dependency of threshold value current by a method wherein a dual hetero structured laser diode is provided on the central part of a concave of n-GaAs substrate while two homo-structured leak diodes are provided on both side shoulders. CONSTITUTION:An n-AlyGa1-yAs enclosed layer 12, an AlxGa1-yAs active layer 13, a p-AlyGa1-yAs enclosed layer 14, a p -GaAs cap layer 15 are laminated on an n-GaAs substrate 11 fixing striped SiO2 film 16, electrodes 17, 18 thereto. The active layer 13 is 0.15mum thick, x=0.12, the layers 12, 14 select y=0.53 and the layer 14 is added with Mg. At this time, within a concave 10, Mg is diffused crossing the layer 13, p-n junction J1 is formed near the boundary of the layers 12-13, J2 is formed crossing the layer 12 coming into the substrate 11 thus forming dual hetero laser diode 2 on the central part and homo-leak diodes 3 on both sides in parallel. In such a constitution, the change of threshold value current within the range of -20 deg.C-+50 deg.C may not exceed 5% in case of 20 deg.C subject to almost no fluctuation of optical output during constant current operation.

Abstract translation: 目的：通过一种方法来降低阈值电流的温度依赖性，其中在n-GaAs衬底的凹部的中心部分设置双异质结构的激光二极管，而在两侧设置两个同构的漏极二极管。 构成：将n-Al y Ga 1-yAs封装层12，Al x Ga 1-yAs有源层13，p-Al y Ga 1-yAs封装层14，ap + GaAs覆盖层15层合在n-GaAs衬底11上， SiO 2膜16，电极17,18。 有源层13的厚度为0.15μm，x = 0.12，层12,14选择y = 0.53，层14加入Mg。 此时，在凹面10内，Mg与层13交叉扩散，在层12-13的边界附近形成pn结J1，J2与形成在衬底11中的层12交叉形成，从而形成双异质激光二极管 2在中心部分，同侧漏极二极管3两侧并联。 在这样的结构中，在-20℃〜+ 50℃的范围内的阈值电流的变化在20度的情况下可能不超过5％，在恒定电流操作期间几乎不产生光输出的波动 。