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公开(公告)号:JP2000112584A
公开(公告)日:2000-04-21
申请号:JP19816699
申请日:1999-07-12
Applicant: TANDEM COMPUTERS INC
Inventor: JEWETT DOUGLAS E , BEREITER TOM , VETTER BRIAN , RANDALL G BANTON , RICHARD W KATZ JR , DONALD C WESTBROOKE , KIRAN W FAYE JR , JOHN POSLOW , KENNETH C DUBACKER , MEHTA NIKHIL A , PHIL WEBSTER , ALDRIDGE DAVE , PETER C NORWOOD
Abstract: PROBLEM TO BE SOLVED: To obtain an improved fault allowable highly reliable system by automatically interrupting a backup power supply when main power supply is not restored within prescribed time to stop the execution of a central processing part. SOLUTION: In a time series of interruption and restart procedures, a CPU executes an instruction stream by normal operation during the period of time 171 and abnormality in AC power supply is generated at time 172. Althrough the power supply abnormality is signaled from a maintenance processor to the CPU by interruption, the interruption of power supply is not immediately started. Instead, time delay is introduced over an interval 173 in order to exclude a transitional phonomenon and then a power supply abnormality signal is generated from the CPU at time 174. An interruption process is continued over a period 175 and completed at time 176. When AC power is restored during the period, the restart procedure is immediately started at the time 176. The restart procedure is continued over a period 177 and completed at time 178.
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公开(公告)号:AT168796T
公开(公告)日:1998-08-15
申请号:AT95111528
申请日:1990-12-18
Applicant: TANDEM COMPUTERS INC
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公开(公告)号:CA2032067A1
公开(公告)日:1991-06-23
申请号:CA2032067
申请日:1990-12-12
Applicant: TANDEM COMPUTERS INC
Inventor: JEWETT DOUGLAS E , BEREITER TOM , VETTER BRIAN , BANTON RANDALL G , CUTTS RICHARD W JR , WESTBROOK DONALD C , FEY KYRAN W JR , POZDRO JOHN , DEBACKER KENNETH C , MEHTA NIKHIL A , WEBSTER PHIL , ALDRIDGE DAVE , NORWOOD PETER C
IPC: G06F1/12 , G06F1/30 , G06F11/07 , G06F11/10 , G06F11/14 , G06F11/16 , G06F11/18 , G06F11/20 , G06F11/22 , G06F11/273
Abstract: FAULT-TOLERANT COMPUTER SYSTEM WITH ONLINE REINTEGRATION AND SHUTDOWN/RESTART A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory modules in the address space of the CPUs storing duplicates of the same data. The system detects faults in the CPUs and memory modules, and places a faulty unit of offline while continuing to operate using the good units. The faulty unit can be replaced and reintegrated into the system without shutdown. The computer system employs a power supply system including a battery backup so that upon AC power failure the system can execute an orderly shutdown, saving state to disk. A restart procedure restores the state existing at the time of power failure if the AC power has been restored by the time the shutdown is completed. The system employs a pseudo-filesystem to dynamically manage the hardware components. A directory which appears as a standard, hierarchical directory in this filesystem contains a file for each component; each file maps to either a hardware component or a software module. The pseudo-filesystem hierarchy is determined during system initialization and is automatically updated whenever the software or hardware configuration changes. The pseudo-filesystem, called /config filesystem herein, is implemented as a Unix filesystem in the Unix filesystem switch. The multiple CPUs are loosely synchronized, as by detecting events such as memory references and stalling any CPU ahead of others until all execute the function simultaneously; interrupts can be synchronized by ensuring that all CPUs implement the interrupt at the same point in their instruction stream. Memory references via the separate CPU-to-memory busses are voted at the three separate ports of each of the memory modules. I/O functions are implemented using two identical I/O busses, each of which is separately coupled to only one of the memory modules. A number of I/O processors are coupled to both I/O busses. I/O devices are accessed through a pair of identical (redundant) I/O processors, but only one is designated to actively control a given device; in case of failure of one I/O processor, however, an I/O device can be accessed by the other one without system shutdown.
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公开(公告)号:DE69032508T2
公开(公告)日:1999-03-25
申请号:DE69032508
申请日:1990-12-18
Applicant: TANDEM COMPUTERS INC
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公开(公告)号:DE69032508D1
公开(公告)日:1998-08-27
申请号:DE69032508
申请日:1990-12-18
Applicant: TANDEM COMPUTERS INC
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