公开(公告)号：JPS63273134A

公开(公告)日：1988-11-10

申请号：JP8708288

申请日：1988-04-08

Applicant: TANDEM COMPUTERS INC

Inventor： DANIERU II RENOOSUKI

IPC: G06F9/28 ,  G06F9/22 ,  G06F9/318 ,  G06F9/38

Abstract: A method and mechanism for shortening the execution time of certain macro-instructions by looking at both a present macro-instruction and a next macro-instruction. The invention includes two, interrelated aspects for accomplishing this. First, a first operation of a next macro-instruction is performed concurrently with a last operation of a current macro-instruction. Second, the next macro-instruction is decoded to determine the minimum number of clock cycles it requires. If this minimum number is below a specified number, the micro operations of the present instruction are modified to perform appropriate set-up operations for the next macro-instruction to enable it to be completed in the computed minimum number of clock cycles.

公开(公告)号：JPS63280340A

公开(公告)日：1988-11-17

申请号：JP9804588

申请日：1988-04-20

Applicant: TANDEM COMPUTERS INC

Inventor： DANIERU II RENOOSUKI ,  DEIBUITSUDO JIEI GAASHIA

IPC: G06F11/22 ,  G01R31/28 ,  G01R31/3185

公开(公告)号：JPH01269293A

公开(公告)日：1989-10-26

申请号：JP8626488

申请日：1988-04-07

Applicant: TANDEM COMPUTERS INC

Inventor： DANIERU II RENOOSUKI

IPC: G11C7/00 ,  G06F7/78 ,  G06F9/34

Abstract: PURPOSE: To eliminate the need for decoding logic and to simplify a structure by shifting a pointer toward the right or left as a data element is pushed onto a stack or is popped therefrom. CONSTITUTION: The input of a register 26 where the bit of digital 1 receives the first data element of the stack under a load constant is enabled in an example of a last-in first-out LIFO. The pointer is circulated to the left in such a manner that the input of the register 32 is enabled at the time of adding the next data element. In the case of the pop operation to fetch the uppermost data element of the stack, an enable signal is applied to a line 46 to enable the output driver 38 for the register 30 and the pointer is circulated to the right so as to indicate the register 32. The pointer in the stack 24 is circulated and the input data element is not applied to the input bus 34 until the pointer indicates the empty register in the writing operation. The output 36 is read before the circulation of the pointer in the stack 24 in such a manner that the uppermost data element is read in the reading operation.

公开(公告)号：JPS644833A

公开(公告)日：1989-01-10

申请号：JP8889588

申请日：1988-04-11

Applicant: TANDEM COMPUTERS INC

Inventor： PIITAA ERU FUU ,  DANIERU II RENOOSUKI

IPC: G06F9/22 ,  G06F9/26

Abstract: PURPOSE: To make a microcode changeable by varying the number of address locations for every instruction while maintaining a fixed entrance point mapping system. CONSTITUTION: A variable incrementer 66 is provided with a +1 incrementer 70, +512 incrementer 72 and multiplexer(MUX) 74. At the time of operating, an address to be applied to a microcode memory RAM 32 is incremented just for 512 by the incrementer 72, and a new address is guided through the multiplexer 74 to a microcode program counter(PC) register 36. Until a memory area decode circuit 68 detects that the address corresponds to an overflow area 64, this process is continued. When that is detected, the decode circuit 68 applies a select signal to the multiplexer 74, and the output of the +1 incrementer 70 is selected. Therefore, the address to the microcode memory RAM 32 is incremented one by one.

公开(公告)号：JPS63273142A

公开(公告)日：1988-11-10

申请号：JP9332988

申请日：1988-04-15

Applicant: TANDEM COMPUTERS INC

Inventor： PIITAA ERU FUU ,  DANIERU II RENOOSUKI

IPC: G06F11/22 ,  G01R31/3185 ,  G06F11/08 ,  G06F11/10 ,  G06F11/16