公开(公告)号：JPH01280843A

公开(公告)日：1989-11-13

申请号：JP30046388

申请日：1988-11-28

Applicant: TANDEM COMPUTERS INC

Inventor： MAATEIN DABURIYUU SANAA ,  SHIIMA CHIYANDORA

IPC: G06F11/30 ,  G06F11/00 ,  G06F11/26 ,  G06F11/28 ,  G06F13/00

Abstract: PURPOSE: To guarantee the correct operation of a state machine by rewriting a slave state machine by an emulator in response to control signals from a master state machine, checking respective assumed states rewritten by the emulator and generating error signals in the case of an erroneous operation. CONSTITUTION: The slave state machine 40 to be rewritten by the emulator receives signals from a state decoder 34 for assuming the states same as the ones assumed by the state machine of a slave control unit 22. The output of the slave state machine 40 is added to a state sequence checker unit similarly to the output of the master state machine 30. A state sequence checker 42 performs checking by a method for deciding whether or not the respective states assumed by the two state machines 30 and 40 are correct, and when they are not correct, the state sequence checker 42 originates the error signals for indicating a problem. Thus, the correct operation of the state machine is guaranteed.