公开(公告)号：JPS60167036A

公开(公告)日：1985-08-30

申请号：JP20389784

申请日：1984-09-28

Applicant: TANDEM COMPUTERS INC

Inventor： WHITING HORST ROBERT ,  HARRIS RICHARD LEE

IPC: G06F20060101 ,  G06F9/00 ,  G06F9/22 ,  G06F9/26 ,  G06F9/38 ,  G06F9/40 ,  G06F9/42

公开(公告)号：IN162543B

公开(公告)日：1988-06-11

申请号：IN692CA1984

申请日：1984-09-27

Applicant: TANDEM COMPUTERS INC

Inventor： WHITING HORST ROBERT ,  COLLINS RICHARD MATTHEW ,  LAUER GILBERT EUGENE

IPC: G06F12/16 ,  G06F12/06 ,  G11C7/00

Abstract: A method for automatically reconfiguring the memory address space of a plurality of memory boards allows varying capacity boards to be arbitrarily assigned to backplane locations without human intervention. By reading from a nonvolatile memory on each memory board, a processor can determine the proper address range to assign each memory board. It can then load this information into the borad's configuration register and, if necessary, update the board's nonvolatile memory. Each memory board then uses the addresses of incoming access requests and the contents of its configuration register to determine which memory components are to be accessed.

公开(公告)号：IN162545B

公开(公告)日：1988-06-11

申请号：IN694CA1984

申请日：1984-09-27

Applicant: TANDEM COMPUTERS INC

Inventor： WHITING HORST ROBERT ,  LYNCH SHANNON JOSEPH ,  CONSTANTINO CIRILLO LINO

IPC: G06F7/00 ,  G06F9/30 ,  G06F9/38 ,  G06K17/00

Abstract: The various functional units which comprise a central pro- cessing unit of a computer are organized so as to enable a main arithmetic logic unit and special function units including an auxilliary arithmetic logic unit to access data registers, literal constants, and data from a memory cache. A general purpose bus closely couples the functional units to the main data paths and allows the CPU sequencer to branch on numerous conditions which may be indicated via test lines. Parity from the functional units is sent a clock cycle later than results in order that the parity path does not affect machine cycle time. The architecture allows unused microcode options to be used to check for correct CPU operation by halting CPU operation on a miscompare of two buses.

公开(公告)号：IN162544B

公开(公告)日：1988-06-11

申请号：IN693CA1984

申请日：1984-09-27

Applicant: TANDEM COMPUTERS INC

Inventor： WHITING HORST ROBERT ,  HARRIS RICHARD LEE

IPC: G06F20060101 ,  G06F9/00 ,  G06F9/22 ,  G06F9/26 ,  G06F9/38 ,  G06F9/40 ,  G06F9/42 ,  G06K17/00

Abstract: Hardware for performing microcode branching in a central processing unit allows for two different speeds of branches which can be used by microcode and includes flexibility to optionally inhibit the extra lines which enter the pipeline on a branch. A default branch path can be taken for a test result not yet available and can be replaced with a correct branch target during a clock pause if the test result is false. A return address stack is provided with decoupled loading and pushing to accommodate the two branching speeds. Microcode can specify loading the return address stack with a literal or register value to allow vectored branching and returning to a desired line after a delayed call.