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    VERTICAL MAGNETIC RECORDING MEDIUM AND PROCESS FOR PREPARATION THEREOF
    2.
    发明专利
    VERTICAL MAGNETIC RECORDING MEDIUM AND PROCESS FOR PREPARATION THEREOF 未知

    公开(公告)号：CA1235808A

    公开(公告)日：1988-04-26

    申请号：CA476830

    申请日：1985-03-18

    Applicant: TORAY INDUSTRIES

    Inventor： OKA TETSUO ,  HAYASHI KENJI ,  AKAMATSU TAKAYOSHI ,  HORIUCHI SATOSHI

    IPC: G11B5/64 ,  G11B5/85

    Abstract: VERTICAL MAGNETIC RECORDING MEDIUM AND PROCESS FOR PREPARATION THEREOF A vertical magnetic recording medium comprising a substrate and a magnetic layer formed on the substrate and having a magnetic anisotropy in the direction vertical to the surface of the substrate is described. The magnetic layer is composed substantially of a metal selected from cobalt and/or iron, and an oxide of the metal. The metal and metal oxide consist of columnar structures oriented in the direction vertical to the surface of the substrate and spaced from one another through fine voids throughout the magnetic layer. The columnar structures have a diameter of 100 to 1000 .ANG. and the magnetic layer have a void ratio of to 56%. The vertical magnetic recording medium is prepared by a process for vacuum-depositing a metal selected from cobalt and iron to form a magnetic layer on a substrate, wherein an oxygen gas and at least one gas chemically inactive in the vacuum deposition system, which is selected from nitrogen, argon, helium, neon, xenon, radon, methane and ethane, are introduced into the vacuum to an extent such that the pressure in the vicinity of the substrate is 1 x 10-3 to 5 x 10-2 Torr.

    VERTICAL MAGNETIC RECORDING MEDIUM AND PROCESS FOR PREPARATION THEREOF
    3.
    发明专利
    VERTICAL MAGNETIC RECORDING MEDIUM AND PROCESS FOR PREPARATION THEREOF 未知

    公开(公告)号：DE3573482D1

    公开(公告)日：1989-11-09

    申请号：DE3573482

    申请日：1985-03-20

    Applicant: TORAY INDUSTRIES

    Inventor： OKA TETSUO ,  HAYASHI KENJI ,  AKAMATSU TAKAYOSHI ,  HORIUCHI SATOSHI

    IPC: G11B5/64 ,  G11B5/85

    Abstract: A vertical magnetic recording medium comprises substrate (4) and a magnetic layer (3) formed on the substrate (4) and having a magnetic anisotropy in the direction vertical to the surface of the substrate. The magnetic layer (3) is composed substantially of a metal selected from cobalt and/ or iron, and an oxide of the metal. The metal and metal oxide consist of columnar structures (1) oriented in the direction vertical to the surface of the substrate (4) and spaced from one another through fine voids (2) throughout the magnetic layer. The columnar structures (1) have a diameter of 100 to 1000 A and the magnetic layer (3) has a void ratio of 7 to 56%. The vertical magnetic recording medium is prepared by a process for vacuum-depositing a metal selected from cobalt and iron to form a magnetic layer on a substrate, wherein an oxygen gas and at least one gas chemically inactive in the vacuum deposition system, which is selected from nitrogen, argon, helium, neon, xenon, radon, methane and ethane, are introduced into the vacuum to an extent such that the pressure in the vicinity of the substrate is 1 x 10 3 to 5 x 10 2 Torr.

    4.
    发明专利
    未知

    公开(公告)号：DE69932945T2

    公开(公告)日：2007-03-15

    申请号：DE69932945

    申请日：1999-11-05

    Applicant: TORAY INDUSTRIES

    Inventor： SHIRO KUNIYASU ,  MINAMIGUCHI HISASHI ,  OKA TETSUO

    IPC: B24B37/00 ,  B24B37/20 ,  B24B37/22 ,  B24B37/24 ,  B24D13/14

    Abstract: The present invention relates to a polishing pad which is characterized in that it has a polishing layer of rubber A-type microhardness at least 80 DEG and a cushioning layer of bulk modulus at least 40 MPa and tensile modulus in the range 0.1 MPa to 20 MPa, and to a polishing device which is characterized in that a semiconductor substrate is fixed to the polishing head, and an aforesaid polishing pad is fixed to the polishing platen so that the polishing layer faces the semiconductor substrate, and by rotating the aforesaid polishing head or the polishing platen, or both, the semiconductor substrate is polished. With the polishing device or polishing pad of the present invention for use in the mechanical planarizing process wherein the surface of the insulating layers or metal interconnects formed on a semiconductor substrate are smoothened, it is possible to uniformly planarize the entire semiconductor face and perform uniform polishing close up to the wafer edge and, furthermore, it is possible to provide a technique for achieving both uniformity and planarity under conditions of high platen rotation rate.

    6.
    发明专利
    未知

    公开(公告)号：AT337137T

    公开(公告)日：2006-09-15

    申请号：AT99954409

    申请日：1999-11-05

    Applicant: TORAY INDUSTRIES

    Inventor： SHIRO KUNIYASU ,  MINAMIGUCHI HISASHI ,  OKA TETSUO

    IPC: B24B37/00 ,  B24B37/20 ,  B24B37/22 ,  B24B37/24 ,  B24D13/14

    Abstract: The present invention relates to a polishing pad which is characterized in that it has a polishing layer of rubber A-type microhardness at least 80 DEG and a cushioning layer of bulk modulus at least 40 MPa and tensile modulus in the range 0.1 MPa to 20 MPa, and to a polishing device which is characterized in that a semiconductor substrate is fixed to the polishing head, and an aforesaid polishing pad is fixed to the polishing platen so that the polishing layer faces the semiconductor substrate, and by rotating the aforesaid polishing head or the polishing platen, or both, the semiconductor substrate is polished. With the polishing device or polishing pad of the present invention for use in the mechanical planarizing process wherein the surface of the insulating layers or metal interconnects formed on a semiconductor substrate are smoothened, it is possible to uniformly planarize the entire semiconductor face and perform uniform polishing close up to the wafer edge and, furthermore, it is possible to provide a technique for achieving both uniformity and planarity under conditions of high platen rotation rate.

    POLISHING PAD
    8.
    发明公开
    POLISHING PAD 有权
    抛光垫上，

    公开(公告)号：EP1108500A4

    公开(公告)日：2002-08-07

    申请号：EP99940476

    申请日：1999-08-25

    Applicant: TORAY INDUSTRIES

    Inventor： SHIRO KUNIYASU ,  HASHISAKA KAZUHIKO ,  OKA TETSUO

    IPC: B24B37/20 ,  B24B37/24 ,  B24D3/28 ,  B24D13/14 ,  B24B37/00

    CPC classification number: B24B37/24 ,  B24D3/28

    Abstract: A polishing pad, characterized by having a micro-rubber. A hardness number of 80 or larger, closed cells with an average cell diameter of not larger than 1000 νm and a density ranging from 0.4 to 1.1 and containing a polymer polymerized from polyurethane and a vinyl compound, the polishing pad having a high finishing rate, being small in global step difference and not likely to cause metal wire dishing, loading and permanent set in fatigue at a front layer portion and providing a stable finishing rate when a localized unevenness on a semiconductor substrate is to be flattened.

    POLISHING PAD AND POLISHING DEVICE
    10.
    发明公开
    POLISHING PAD AND POLISHING DEVICE 有权
    抛光垫上，抛光设备

    公开(公告)号：EP1138438A4

    公开(公告)日：2002-08-07

    申请号：EP99954409

    申请日：1999-11-05

    Applicant: TORAY INDUSTRIES

    Inventor： SHIRO KUNIYASU ,  MINAMIGUCHI HISASHI ,  OKA TETSUO

    IPC: B24B37/00 ,  B24B37/20 ,  B24B37/22 ,  B24B37/24 ,  B24D13/14

    CPC classification number: B24B37/24 ,  Y10S438/959

    Abstract: A polishing pad characterized by comprising a polishing layer having a micro-rubber A hardness of at least 80 degrees and a cushion layer having a bulk modulus of at least 40 Mpa and a tensile elastic modulus of at least 0.1 Mpa and up to 20 Mpa; and a polishing device characterized in that a semiconductor substrate is fixed to a polishing head, the above polishing pad is fixed to a polishing surface plate with the polishing layer facing the semiconductor substrate, and one or both of the polishing head and the polishing surface plate are rotated to polish the semiconductor substrate. A polishing device or a polishing pad used in a mechanical flattening process for smoothing by polishing an insulation layer formed on a semiconductor substrate or the surface of a metal wiring, wherein technologies are provided for uniformly flattening the entire surface of a semiconductor substrate and polishing it uniformly up to a portion close to a wafer edge and for making uniformity and flatness compatible with each other at a high platen rotation speed.

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