公开(公告)号：GB2333178A

公开(公告)日：1999-07-14

申请号：GB9800587

申请日：1998-01-12

Applicant: UNITED MICROELECTRONICS CORP

Inventor： YEW TRI-RUNG ,  LUR WATER ,  SUN SHIH-WEI ,  SHIH HSUE-HAO

IPC: C23C16/04 ,  C23C16/24 ,  H01L21/02 ,  H01L21/205 ,  H01L21/285 ,  H01L21/8242 ,  H01L27/108

Abstract: In a method for fabricating a hemispherical grain silicon structure as a bottom electrode of a capacitor in an integrated circuit, poly-silicon is formed as the seed for nucleation instead of amorphous silicon. A silicon oxide layer 24 provided with a contact hole 22 is formed on a substrate 20. The contact hole is filled with polysilicon and patterned to form a capacitor electrode 26. Native oxide on the electrode is removed by H 2 or HCI solution and then, using chlorosilane as a precursor, a hemispherical grain silicon structure 28 is grown on the electrode by CVD to increase its capacitance. The by-products H 2 and HCI of the reaction prevent growth of the structure 28 on the silicon oxide layer 24.

公开(公告)号：GB2333178B

公开(公告)日：1999-11-24

申请号：GB9800587

申请日：1998-01-12

Applicant: UNITED MICROELECTRONICS CORP

Inventor： YEW TRI-RUNG ,  LUR WATER ,  SUN SHIH-WEI ,  SHIH HSUE-HAO

IPC: C23C16/04 ,  C23C16/24 ,  H01L21/02 ,  H01L21/205 ,  H01L21/285 ,  H01L21/8242 ,  H01L27/108