Method of manufacturing circuit carrier with embedded semiconductor substrate

    公开(公告)号:US10964634B2

    公开(公告)日:2021-03-30

    申请号:US16162396

    申请日:2018-10-17

    Abstract: A circuit carrier with embedded substrate includes a circuit structure and an embedded substrate. The circuit structure includes a first dielectric layer, a first patterned circuit layer, a trench, and a plurality of first bumps. The first dielectric layer has a first surface and a second surface opposite to each other. The first patterned circuit layer is embedded in the first surface. The first bumps are disposed on the first surface and electrically connected to the first patterned circuit layer. The trench exposes a portion of the first dielectric layer. The embedded substrate is disposed in the trench and includes a plurality of second bumps. A chip package structure includes the above circuit carrier with embedded substrate.

    Chip package structure with heat conductive component and manufacturing thereof

    公开(公告)号:US10943846B2

    公开(公告)日:2021-03-09

    申请号:US16215671

    申请日:2018-12-11

    Abstract: A chip package structure includes a circuit structure, a redistribution structure, a heat conductive component, a chip, and a heat sink. The circuit structure includes a first circuit layer. The redistribution structure is disposed on the circuit structure and includes a second circuit layer, wherein the redistribution structure has an opening. The heat conductive component is disposed on the circuit structure and covered by the redistribution structure. The heat conductive component has a horizontal portion and a vertical portion. The horizontal portion extends toward the opening until it exceeds the opening. The vertical portion extends upward beyond the top surface of the redistribution structure from a part of the horizontal portion. The chip is disposed in the opening, and the bottom of the chip contacts the heat conductive component. The heat sink is disposed over the redistribution structure and the chip.

    CIRCUIT CARRIER WITH EMBEDDED SUBSTRATE, MANUFACTURING METHOD THEREOF AND CHIP PACKAGE STRUCTURE

    公开(公告)号:US20200075469A1

    公开(公告)日:2020-03-05

    申请号:US16162396

    申请日:2018-10-17

    Abstract: A circuit carrier with embedded substrate includes a circuit structure and an embedded substrate. The circuit structure includes a first dielectric layer, a first patterned circuit layer, a trench, and a plurality of first bumps. The first dielectric layer has a first surface and a second surface opposite to each other. The first patterned circuit layer is embedded in the first surface. The first bumps are disposed on the first surface and electrically connected to the first patterned circuit layer. The trench exposes a portion of the first dielectric layer. The embedded substrate is disposed in the trench and includes a plurality of second bumps. A chip package structure includes the above circuit carrier with embedded substrate.

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