公开(公告)号：US11315865B2

公开(公告)日：2022-04-26

申请号：US17234826

申请日：2021-04-20

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chen Lin

IPC: H05K3/06 ,  H01L23/498 ,  H01L21/48 ,  H05K1/11

Abstract: A method of manufacturing circuit board structure includes forming a sacrificial layer having first openings on a substrate; forming a metal layer on the sacrificial layer; forming a patterned photoresist layer having second openings over the sacrificial layer, in which the second openings are connected to the first openings and expose a portion of the metal layer; forming a first circuit layer filling the second openings and the first openings; forming a first dielectric layer over the sacrificial layer and covering the metal layer, in which the first dielectric layer has third openings exposing the first circuit layer; forming a second circuit layer filling the third openings and covering a portion of the first dielectric layer; removing the substrate to expose the sacrificial layer, a portion of the metal layer and a portion of the first circuit layer; and removing the sacrificial layer and the metal layer.

公开(公告)号：US10964634B2

公开(公告)日：2021-03-30

申请号：US16162396

申请日：2018-10-17

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chen Lin ,  Tzu-Hsuan Wang ,  Kuan-Wen Fong

IPC: H01L23/498 ,  H01L21/768 ,  H01L23/00 ,  H01L23/532

Abstract: A circuit carrier with embedded substrate includes a circuit structure and an embedded substrate. The circuit structure includes a first dielectric layer, a first patterned circuit layer, a trench, and a plurality of first bumps. The first dielectric layer has a first surface and a second surface opposite to each other. The first patterned circuit layer is embedded in the first surface. The first bumps are disposed on the first surface and electrically connected to the first patterned circuit layer. The trench exposes a portion of the first dielectric layer. The embedded substrate is disposed in the trench and includes a plurality of second bumps. A chip package structure includes the above circuit carrier with embedded substrate.

公开(公告)号：US11153963B2

公开(公告)日：2021-10-19

申请号：US16845069

申请日：2020-04-10

Applicant: Unimicron Technology Corp.

Inventor： Chang-Fu Chen ,  Ho-Shing Lee ,  Chien-Chen Lin

IPC: H05K1/02 ,  H05K3/00 ,  H05K1/11 ,  H05K3/06 ,  H05K3/46

Abstract: A circuit carrier structure includes an inner circuit structure, at least one first circuit layer, and at least one heat dissipating structure. The inner circuit structure has a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface of the inner circuit structure. The heat dissipating structure is disposed in the first circuit layer. The heat dissipating structure includes a first heat dissipating pattern, a second heat dissipating pattern and an interlayer metal layer. The first heat dissipating pattern is embedded in the corresponding first circuit layer. The second heat dissipating pattern is disposed on the first heat dissipating pattern. The interlayer metal layer is disposed between the first heat dissipating pattern and the second heat dissipating pattern. A manufacturing method of the circuit carrier structure is also provided.

公开(公告)号：US11011458B2

公开(公告)日：2021-05-18

申请号：US16579812

申请日：2019-09-23

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chen Lin

IPC: H05K1/11 ,  H01L23/498 ,  H01L21/48

Abstract: A method of manufacturing circuit board structure includes forming a sacrificial layer having first openings on a substrate; forming a metal layer on the sacrificial layer; forming a patterned photoresist layer having second openings over the sacrificial layer, in which the second openings are connected to the first openings and expose a portion of the metal layer; forming a first circuit layer filling the second openings and the first openings; forming a first dielectric layer over the sacrificial layer and covering the metal layer, in which the first dielectric layer has third openings exposing the first circuit layer; forming a second circuit layer filling the third openings and covering a portion of the first dielectric layer; removing the substrate to expose the sacrificial layer, a portion of the metal layer and a portion of the first circuit layer; and removing the sacrificial layer and the metal layer.

公开(公告)号：US10575397B1

公开(公告)日：2020-02-25

申请号：US16445242

申请日：2019-06-19

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chen Lin

IPC: H05K1/03 ,  H05K3/46 ,  H05K3/00 ,  H05K1/02 ,  H01L23/00 ,  H01L23/498

Abstract: A circuit carrier structure includes a glass substrate, an anti-warping layer, a conductive layer, a build-up circuit layer, and a conductive via. The glass substrate has a first surface, a second surface opposite to the first surface, and a through groove penetrating the glass substrate. The anti-warping layer is disposed on the first surface of the glass substrate and has at least one first opening and a second opening. The conductive layer is disposed in the first opening of the anti-warping layer. The build-up circuit layer is disposed on the second surface of the glass substrate. The conductive via penetrates the glass substrate. The conductive via is disposed corresponding to the first opening of the anti-warping layer, and the through groove is disposed corresponding to the second opening of the anti-warping layer, and the through groove exposes a portion of the build-up circuit layer.

公开(公告)号：US20200051885A1

公开(公告)日：2020-02-13

申请号：US16133711

申请日：2018-09-18

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chen Lin ,  Tzu-Hsuan Wang

IPC: H01L23/367 ,  H01L21/768 ,  H01L23/538 ,  H01L23/522 ,  H01L23/373

Abstract: A heat dissipation substrate includes an inner circuit structure, a first build-up circuit structure and a heat dissipation channel. The first build-up circuit structure is disposed on the inner circuit structure, and includes an interlayer dielectric layer, a first dielectric layer, a first patterned conductive layer and a plurality of first conductive vias.The first patterned conductive layer and the first dielectric layer are sequentially stacked on the interlayer dielectric layer. The heat dissipation channel is disposed around the chip disposing area on the first build-up circuit structure and has a first opening and a second opening. The first opening penetrates through the first dielectric layer and exposes a portion of the interlayer dielectric layer. The second opening is disposed on a side surface of the first build-up circuit structure. The first opening is in communication with the second opening.

公开(公告)号：US10943846B2

公开(公告)日：2021-03-09

申请号：US16215671

申请日：2018-12-11

Applicant: Unimicron Technology Corp.

Inventor： Tzu-Hsuan Wang ,  Chien-Chen Lin ,  Kuan-Wen Fong

IPC: H01L23/36 ,  H01L23/367 ,  H01L23/498 ,  H01L23/13 ,  H01L21/48 ,  H01L23/00

Abstract: A chip package structure includes a circuit structure, a redistribution structure, a heat conductive component, a chip, and a heat sink. The circuit structure includes a first circuit layer. The redistribution structure is disposed on the circuit structure and includes a second circuit layer, wherein the redistribution structure has an opening. The heat conductive component is disposed on the circuit structure and covered by the redistribution structure. The heat conductive component has a horizontal portion and a vertical portion. The horizontal portion extends toward the opening until it exceeds the opening. The vertical portion extends upward beyond the top surface of the redistribution structure from a part of the horizontal portion. The chip is disposed in the opening, and the bottom of the chip contacts the heat conductive component. The heat sink is disposed over the redistribution structure and the chip.

公开(公告)号：US20200075469A1

公开(公告)日：2020-03-05

申请号：US16162396

申请日：2018-10-17

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chen Lin ,  Tzu-Hsuan Wang ,  Kuan-Wen Fong

IPC: H01L23/498 ,  H01L21/768 ,  H01L23/00 ,  H01L23/532

Abstract: A circuit carrier with embedded substrate includes a circuit structure and an embedded substrate. The circuit structure includes a first dielectric layer, a first patterned circuit layer, a trench, and a plurality of first bumps. The first dielectric layer has a first surface and a second surface opposite to each other. The first patterned circuit layer is embedded in the first surface. The first bumps are disposed on the first surface and electrically connected to the first patterned circuit layer. The trench exposes a portion of the first dielectric layer. The embedded substrate is disposed in the trench and includes a plurality of second bumps. A chip package structure includes the above circuit carrier with embedded substrate.

公开(公告)号：US11637060B2

公开(公告)日：2023-04-25

申请号：US17654405

申请日：2022-03-11

Applicant: Unimicron Technology Corp.

Inventor： Chun-Hao Chen ,  Chia-Lung Lin ,  Chien-Hsiang Chou ,  Yi-Lin Chiang ,  Chien-Chen Lin

IPC: H05K1/11 ,  H05K3/40 ,  H01L23/498 ,  H01L21/48 ,  H05K3/06

Abstract: A wiring board includes an insulating layer, a wiring layer and a plurality of conductive columns. The insulating layer has a first surface and a second surface opposite to the first surface. The wiring layer is disposed in the insulating layer and has a third surface and a fourth surface opposite to the third surface. The insulating layer covers the third surface, and the second surface of the insulating layer is flush with the fourth surface of the wiring layer. The conductive columns are disposed in the insulating layer and connected to the wiring layer. The conductive columns extend from the third surface of the wiring layer to the first surface of the insulating layer, and protrude from the first surface.

公开(公告)号：US20210289614A1

公开(公告)日：2021-09-16

申请号：US16845069

申请日：2020-04-10

Applicant: Unimicron Technology Corp.

Inventor： Chang-Fu Chen ,  Ho-Shing Lee ,  Chien-Chen Lin

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/46 ,  H05K3/06 ,  H05K1/11

Abstract: A circuit carrier structure includes an inner circuit structure, at least one first circuit layer, and at least one heat dissipating structure. The inner circuit structure has a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface of the inner circuit structure. The heat dissipating structure is disposed in the first circuit layer. The heat dissipating structure includes a first heat dissipating pattern, a second heat dissipating pattern and an interlayer metal layer. The first heat dissipating pattern is embedded in the corresponding first circuit layer. The second heat dissipating pattern is disposed on the first heat dissipating pattern. The interlayer metal layer is disposed between the first heat dissipating pattern and the second heat dissipating pattern. A manufacturing method of the circuit carrier structure is also provided.