公开(公告)号：WO03039974A2

公开(公告)日：2003-05-15

申请号：PCT/US0236032

申请日：2002-11-07

Applicant: XILINX INC

Inventor： CHEE SOON-SHIN ,  ZHANG LEILEI

IPC: H01L25/10 ,  H05K1/14 ,  H05K3/28 ,  H05K3/34 ,  B65D

CPC classification number: H01L24/97 ,  H01L25/105 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1005 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/1626 ,  H05K1/141 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2924/00014 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00

Abstract: A multi-package module package includes a plurality of individually packaged chips. Yield is increased over conventional multi-chip packages because the individual chips can be inexpensively and fully tested before being placed into the multi-package module package. Also, the manufacturing process is simpler because the individual chips can be more easily handled while being tested and attached to the multi-package module package. Further, a standard component surface mount process is used for package assembly. Thus, no new capital investment or process development is needed.

Abstract translation: 多封装模块封装包括多个单独封装的芯片。 产量比传统的多芯片封装增加，因为单个芯片在放入多封装模块封装之前可以经济实惠并经过充分测试。 此外，制造过程更简单，因为在测试和附接到多封装模块封装件时，可以更容易地处理各个芯片。 此外，标准组件表面贴装工艺用于封装组装。 因此，不需要新的资本投资或过程开发。