公开(公告)号：WO2022098396A1

公开(公告)日：2022-05-12

申请号：PCT/US2021/038842

申请日：2021-06-24

Applicant: XILINX, INC.

Inventor： CHIANG, Ping Chuan ,  RAJ, Mayank ,  XIE, Chuan ,  CHEN, Stanley Y. ,  KUMAR, Sandeep ,  PATTANAGIRI, Sukruth ,  UPADHYAYA, Parag ,  FRANS, Yohan

IPC: H04B10/80 ,  H04B10/69

Abstract: Examples described herein generally relate to a temperature-locked loop for optical elements. In an example, a device includes a controller and a digital-to- analog converter (DAC). The controller includes a DC-controllable transimpedance stage (DCTS), a sheer circuit, and a processor. The DCTS is configured to be coupled to a photodiode. An input node of the sheer circuit is coupled to an output node of the DCTS. The processor has an input node coupled to an output node of the sheer circuit. The DAC has an input node coupled to an output node of the processor and is configured to be coupled to a heater. The processor is configured to control (i) the DCTS to reduce a DC component of a signal on the output node of the DCTS and (ii) an output voltage on the output node of the DAC, both based on a signal output by the sheer circuit.

公开(公告)号：EP4241399A1

公开(公告)日：2023-09-13

申请号：EP21743344.0

申请日：2021-06-24

Applicant: Xilinx, Inc.

Inventor： CHIANG, Ping Chuan ,  RAJ, Mayank ,  XIE, Chuan ,  CHEN, Stanley Y. ,  KUMAR, Sandeep ,  PATTANAGIRI, Sukruth ,  UPADHYAYA, Parag ,  FRANS, Yohan

IPC: H04B10/80 ,  H04B10/69