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    PROGRAMMABLE DIGITAL SIGMA DELTA MODULATOR
    1.
    发明申请
    PROGRAMMABLE DIGITAL SIGMA DELTA MODULATOR 审中-公开

    公开(公告)号：WO2019231857A1

    公开(公告)日：2019-12-05

    申请号：PCT/US2019/034026

    申请日：2019-05-24

    Applicant: XILINX, INC

    Inventor： MEGAWER, Karim M. ,  UPADHYAYA, Parag ,  TURKER MELEK, Didem Z. ,  WU, Zhaoyin D.

    IPC: H03M3/00 ,  H03M7/36 ,  H03L7/197

    Abstract: An example sigma delta modulator (SDM) circuit includes a floor circuit (306), a subtractor (308) having a first input coupled an input of the floor circuit and a second input coupled to an output of the floor circuit, and a multi-stage noise shaping (MASH) converter (302) having a programmable order. The MASH converter includes an input coupled to an output of the subtractor. The SDM further includes a programmable delay circuit (304) having an input coupled to the output of the floor circuit, and an adder (310) having a first input coupled to an output of the MASH converter and a second input coupled to an output of the programmable delay circuit.

    UNIFIED LOW POWER BIDIRECTIONAL PORT
    2.
    发明申请
    UNIFIED LOW POWER BIDIRECTIONAL PORT 审中-公开

    公开(公告)号：WO2020041601A1

    公开(公告)日：2020-02-27

    申请号：PCT/US2019/047725

    申请日：2019-08-22

    Applicant: XILINX, INC.

    Inventor： MA, Shaojun ,  UPADHYAYA, Parag ,  TURKER MELEK, Didem Z.

    IPC: H03K19/0175 ,  H03K19/0185 ,  H04B3/04 ,  H03K19/00

    Abstract: Methods and apparatus relate to a bidirectional differential interface (300) having a voltage-mode transmit driver architecture (325) formed of multiple selectively enabled slices for coarse output resistance impedance matching. In examples, the transmit driver (325) may include a programmable resistance (340) for fine-tuning to impedance match the output resistance for transmit operation. During receive operation, protective voltage may be proactively applied to gates of drive transistors to minimize voltage stresses applied by external signal sources. Some implementations may automatically float the sources of the drive transistors to prevent back-feeding externally driven signal currents during receive mode operations. The transmit driver (325) may have programmable voltage swing on, for example, the upper and/or lower bounds to enhance compatibility. A programmable common mode voltage node may be selectively applied in a termination network (335), for example, through common mode resistors for receive mode operations.

    LINEAR GAIN CODE INTERLEAVED AUTOMATIC GAIN CONTROL CIRCUIT
    3.
    发明申请
    LINEAR GAIN CODE INTERLEAVED AUTOMATIC GAIN CONTROL CIRCUIT 审中-公开
    线性增益代码交织式自动增益控制电路

    公开(公告)号：WO2017146798A1

    公开(公告)日：2017-08-31

    申请号：PCT/US2016/065189

    申请日：2016-12-06

    Applicant: XILINX, INC.

    Inventor： TURKER MELEK, Didem Z. ,  UPADHYAYA, Parag ,  CHANG, Kun-Yung

    IPC: H03G1/00 ,  H03G3/30 ,  H04L25/03

    CPC classification number: H03G3/3036 ,  H03F1/0205 ,  H03F1/0211 ,  H03F3/16 ,  H03F3/45197 ,  H03F2200/555 ,  H03F2203/45492 ,  H03G1/0029 ,  H03G1/0088 ,  H03G3/301 ,  H04B1/123 ,  H04L25/03885

    Abstract: An example automatic gain control (AGC) circuit (206) includes a base current-gain circuit (302) having a programmable source degeneration resistance (304) responsive to first bits of an AGC code word. The AGC circuit further includes a programmable current-gain circuit (308), coupled between an input (328) and an output (330) of the base current-gain circuit, having a programmable current source (312) responsive to second bits of the AGC code word. The AGC circuit further includes a bleeder circuit (314), coupled to the output of the base current-gain circuit, having a programmable current source (316) responsive to logical complements of the second bits of the AGC code word. The AGC circuit further includes a load circuit (318) coupled to the output of the base current-gain circuit.

    Abstract translation: 示例性自动增益控制（AGC）电路（206）包括具有响应于AGC码字的第一位的可编程源极负反馈电阻（304）的基极电流增益电路（302）。 AGC电路进一步包括可编程电流增益电路（308），耦合在基本电流增益电路的输入（328）和输出（330）之间，具有响应于基极电流增益电路的第二位 AGC码字。 AGC电路还包括耦合到基极电流增益电路的输出端的泄放电路（314），其具有响应于AGC码字的第二位的逻辑补码的可编程电流源（316）。 AGC电路还包括耦合到基极电流增益电路的输出的负载电路（318）。

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