公开(公告)号：KR1020060119242A

公开(公告)日：2006-11-24

申请号：KR1020050041928

申请日：2005-05-19

Applicant: 최중호 ,  한국전자통신연구원

Inventor： 최중호

IPC: H03M5/12

CPC classification number: H03M5/12 ,  H03M2201/2233 ,  H03M2201/4155 ,  H03M2201/63

Abstract: A frequency tuning circuit of a continuous-time analog filter using an SAR(Successive Approximation Register) scheme is provided to complete frequency tuning efficiently in a short time even at a high tuning resolution by generating a tuning code of an integrator used in the frequency tuning circuit by using the SAR scheme. A frequency tuning circuit of a continuous-time analog filter of an active-RC type generates a frequency tuning code by using an SAR(Successive Approximation Register) scheme. A frequency tuning code generator determines a code of each bit in sequence as decreasing binary weight starting from an uppermost bit. The frequency tuning time takes as long as N clock periods.

Abstract translation: 提供使用SAR（逐次近似寄存器）方案的连续时间模拟滤波器的频率调谐电路，通过生成用于频率调谐的积分器的调谐码，即使在高调谐分辨率下也能在短时间内有效地完成频率调谐 电路采用SAR方案。 有源RC型连续时间模拟滤波器的频率调谐电路通过使用SAR（连续近似寄存器）方案产生频率调谐码。 频率调谐码发生器根据从最高位开始减少的二进制加权，依次确定每个比特的码。 频率调谐时间需要N个时钟周期。