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公开(公告)号：US11678589B2
公开(公告)日：2023-06-13
申请号：US17178188
申请日：2021-02-17
Applicant: Applied Materials, Inc.
Inventor： Zihao Yang , Mingwei Zhu , Shriram Mangipudi , Mohammad Kamruzzaman Chowdhury , Shane Lavan , Zhebo Chen , Yong Cao , Nag B. Patibandla
CPC classification number: H01L39/2416 , H01L39/2406
Abstract: A method of fabricating a device including a superconductive layer includes depositing a seed layer on a substrate, exposing the seed layer to an oxygen-containing gas or plasma to form a modified seed layer, and after exposing the seed layer to the oxygen-containing gas or plasma depositing a metal nitride superconductive layer directly on the modified seed layer. The seed layer is a nitride of a first metal, and the superconductive layer is a nitride of a different second metal.
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公开(公告)号：US11495461B2
公开(公告)日：2022-11-08
申请号：US16800351
申请日：2020-02-25
Applicant: Applied Materials, Inc.
Inventor： Tejinder Singh , Suketu Arun Parikh , Daniel Lee Diehl , Michael Anthony Stolfi , Jothilingam Ramalingam , Yong Cao , Lifan Yan , Chi-I Lang , Hoyung David Hwang
IPC: H01L21/033 , H01L21/311
Abstract: Methods for forming a film stack comprising a hardmask layer and etching such hardmask layer to form features in the film stack are provided. The methods described herein facilitate profile and dimension control of features through a proper profile management scheme formed in the film stack. In one or more embodiments, a method for etching a hardmask layer includes forming a hardmask layer on a substrate, where the hardmask layer contains a metal-containing material containing a metal element having an atomic number greater than 28, supplying an etching gas mixture to the substrate, and etching the hardmask layer exposed by a photoresist layer.
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公开(公告)号：US10096725B2
公开(公告)日：2018-10-09
申请号：US14531549
申请日：2014-11-03
Applicant: Applied Materials, Inc.
Inventor： Yong Cao , Daniel Lee Diehl , Rongjun Wang , Xianmin Tang , Tai-chou Papo Chen , Tingjun Xu
Abstract: A method for forming an anti-reflective coating (ARC) includes positioning a substrate below a target and flowing a first gas to deposit a first portion of the graded ARC onto the substrate. The method includes gradually flowing a second gas to deposit a second portion of the graded ARC, and gradually flowing a third gas while simultaneously gradually decreasing the flow of the second gas to deposit a third portion of the graded ARC. The method also includes flowing the third gas after stopping the flow of the second gas to form a fourth portion of the graded ARC. In another embodiment a film stack having a substrate having a graded ARC disposed thereon is provided. The graded ARC includes a first portion, a second portion disposed on the first portion, a third portion disposed on the second portion, and a fourth portion disposed on the third portion.
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公开(公告)号：US09499901B2
公开(公告)日：2016-11-22
申请号：US13750318
申请日：2013-01-25
Applicant: APPLIED MATERIALS, INC.
Inventor： Yong Cao , Xianmin Tang , Adolph Miller Allen , Tza-Jing Gung
CPC classification number: C23C14/345 , C23C14/351 , C23C14/54 , H01J37/34
Abstract: Methods for depositing a layer on a substrate are provided herein. In some embodiments, a method of depositing a metal-containing layer on a substrate in a physical vapor deposition (PVD) chamber may include applying RF power at a VHF frequency to a target comprising a metal disposed in the PVD chamber above the substrate to form a plasma from a plasma-forming gas; optionally applying DC power to the target; sputtering metal atoms from the target using the plasma while maintaining a first pressure in the PVD chamber sufficient to ionize a predominant portion of the sputtered metal atoms; and controlling the potential on the substrate to be the same polarity as the ionized metal atoms to deposit a metal-containing layer on the substrate.
Abstract translation: 本文提供了在基板上沉积层的方法。 在一些实施例中，在物理气相沉积（PVD）室中在衬底上沉积含金属层的方法可以包括以VHF频率将RF功率施加到包括设置在衬底上方的PVD室中的金属的靶，以形成 来自等离子体形成气体的等离子体; 可选地向目标施加DC电力; 使用等离子体从靶中溅射金属原子，同时保持PVD室中的第一压力足以离子化主要部分的溅射金属原子; 并且将基板上的电位控制为与电离金属原子相同的极性，以在基板上沉积含金属层。
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公开(公告)号：US09177796B2
公开(公告)日：2015-11-03
申请号：US14269010
申请日：2014-05-02
Applicant: Applied Materials, Inc.
Inventor： Christopher Dennis Bencher , Daniel Lee Diehl , Huixiong Dai , Yong Cao , Tingjun Xu , Weimin Zeng , Peng Xie
IPC: H01L21/311 , H01L21/033 , H01L21/02 , H01L21/027 , H01L21/3105 , C23C14/00 , C23C14/06
CPC classification number: H01L21/0337 , C23C14/0042 , C23C14/06 , C23C14/14 , C23C14/351 , H01L21/02126 , H01L21/0214 , H01L21/02266 , H01L21/0276 , H01L21/0332 , H01L21/3081 , H01L21/3086 , H01L21/3105 , H01L21/31138 , H01L21/31144
Abstract: The embodiments herein provides methods for forming a PVD silicon oxide or silicon rich oxide, or PVD SiN or silicon rich SiN, or SiC or silicon rich SiC, or combination of the preceding including a variation which includes controlled doping of hydrogen into the compounds heretofore referred to as SiOxNyCz:Hw, where w, x, y, and z can vary in concentration from 0% to 100%, is produced as a hardmask with optical properties that are substantially matched to the photo-resists at the exposure wavelength. Thus making the hardmask optically planarized with respect to the photo-resist. This allows for multiple sequences of litho and etches in the hardmask while the photo-resist maintains essentially no optical topography or reflectivity variations.
Abstract translation: 本文的实施方案提供了用于形成PVD氧化硅或富硅氧化物或PVD SiN或富硅SiN或富SiC或富硅SiC的方法或前述组合，包括将氢控制掺入到迄今为止参考的化合物 作为SiO x N y C z：H w，其中w，x，y和z可以在0％至100％的浓度范围内变化，作为具有与曝光波长下的光致抗蚀剂基本匹配的光学性质的硬掩模。 因此使相对于光致抗蚀剂光学平坦化的硬掩模。 这允许在硬掩模中的多个序列的光刻和蚀刻，而光致抗蚀剂基本上保持没有光学形貌或反射率变化。
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Patent Agency Ranking
公开(公告)号：USD1072774S1
公开(公告)日：2025-04-29
申请号：US29769610
申请日：2021-02-06
Applicant: Applied Materials, Inc.
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公开(公告)号：US12142478B2
公开(公告)日：2024-11-12
申请号：US17902357
申请日：2022-09-02
Applicant: Applied Materials, Inc.
Inventor： Chunming Zhou , Jothilingam Ramalingam , Yong Cao , Kevin Vincent Moraes , Shane Lavan
IPC: H01L21/02 , H01L21/677
Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for backside stress engineering of substrates to combat film stresses and bowing issues. In one embodiment, a method of depositing a film layer on a backside of a substrate is provided. The method includes flipping a substrate at a factory interface so that the backside of the substrate is facing up, and transferring the flipped substrate from the factory interface to a physical vapor deposition chamber to deposit a film layer on the backside of the substrate. In another embodiment, an apparatus for depositing a backside film layer on a backside of a substrate, which includes a substrate supporting surface configured to support the substrate at or near the periphery of the substrate supporting surface without contacting an active region on a front side of the substrate.
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公开(公告)号：US12052935B2
公开(公告)日：2024-07-30
申请号：US17178190
申请日：2021-02-17
Applicant: Applied Materials, Inc.
Inventor： Zihao Yang , Mingwei Zhu , Shriram Mangipudi , Mohammad Kamruzzaman Chowdhury , Shane Lavan , Zhebo Chen , Yong Cao , Nag B. Patibandla
IPC: H10N60/01
CPC classification number: H10N60/0241 , H10N60/0156
Abstract: A method of fabricating a device including a superconductive layer includes depositing a seed layer on a substrate at a first temperature, the seed layer being a nitride of a first metal, reducing the temperature of the substrate to a second temperature that is lower than the first temperature, increasing the temperature of the substrate to a third temperature that is higher than the first temperature to form a modified seed layer, and depositing a metal nitride superconductive layer directly on the modified seed layer at the third temperature, the superconductive layer being a nitride of a different second metal.
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公开(公告)号：US12027354B2
公开(公告)日：2024-07-02
申请号：US17861421
申请日：2022-07-11
Applicant: Applied Materials, Inc.
Inventor： Jothilingam Ramalingam , Yong Cao , Ilya Lavitsky , Keith A. Miller , Tza-Jing Gung , Xianmin Tang , Shane Lavan , Randy D Schmieding , John C. Forster , Kirankumar Neelasandra Savandaiah
CPC classification number: H01J37/3488 , C23C14/54 , C23C14/564 , H01J37/32357 , H01J37/32862 , H01J37/3435 , H01J37/3441 , H01J37/3447 , H01J37/32091
Abstract: A physical vapor deposition processing chamber is described. The processing chamber includes a target backing plate in a top portion of the processing chamber, a substrate support in a bottom portion of the processing chamber, a deposition ring positioned at an outer periphery of the substrate support and a shield. The substrate support has a support surface spaced a distance from the target backing plate to form a process cavity. The shield forms an outer bound of the process cavity. In-chamber cleaning methods are also described. In an embodiment, the method includes closing a bottom gas flow path of a processing chamber to a process cavity, flowing an inert gas from the bottom gas flow path, flowing a reactant into the process cavity through an opening in the shield, and evacuating the reaction gas from the process cavity.
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公开(公告)号：US11908696B2
公开(公告)日：2024-02-20
申请号：US17569870
申请日：2022-01-06
Applicant: Applied Materials, Inc.
Inventor： He Ren , Hao Jiang , Mehul Naik , Wenting Hou , Jianxin Lei , Chen Gong , Yong Cao
IPC: H01L21/285 , H01L21/768 , C23C14/56 , C23C14/14 , C23C14/24 , C23C14/06
CPC classification number: H01L21/2855 , C23C14/0641 , C23C14/14 , C23C14/24 , C23C14/56 , H01L21/76829 , H01L21/76876
Abstract: A method of forming an interconnect structure for semiconductor devices is described. The method comprises depositing an etch stop layer on a substrate by physical vapor deposition followed by in situ deposition of a metal layer on the etch stop layer. The in situ deposition comprises flowing a plasma processing gas into the chamber and exciting the plasma processing gas into a plasma to deposit the metal layer on the etch stop layer on the substrate. The substrate is continuously under vacuum and is not exposed to ambient air during the deposition processes.
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