公开(公告)号：US20130143406A1

公开(公告)日：2013-06-06

申请号：US13311948

申请日：2011-12-06

Applicant: Yu-Rung Hsu ,  Sung-Hsun Wu ,  Kuo Bin Huang

Inventor： Yu-Rung Hsu ,  Sung-Hsun Wu ,  Kuo Bin Huang

IPC: H01L21/311

CPC classification number: G03F7/42 ,  G03F7/423 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/67115

Abstract: A method for manufacturing a semiconductor device includes forming a patterned photoresist layer over a substrate, performing a plasma ashing process to the patterned photoresist layer, thereby removing a portion of the patterned photoresist layer, exposing the patterned photoresist layer to broadband ultraviolet radiation and ozone, thereby removing other portions of the patterned photoresist layer, and performing a cleaning of the patterned photoresist layer after exposing the patterned photoresist layer to broadband ultraviolet radiation and ozone.

Abstract translation: 一种用于制造半导体器件的方法包括在衬底上形成图案化的光致抗蚀剂层，对图案化的光致抗蚀剂层执行等离子体灰化处理，从而去除图案化光致抗蚀剂层的一部分，将图案化的光致抗蚀剂层暴露于宽带紫外线辐射和臭氧， 从而去除图案化光致抗蚀剂层的其它部分，并且在将图案化的光致抗蚀剂层暴露于宽带紫外线辐射和臭氧之后，对图案化的光致抗蚀剂层进行清洁。

公开(公告)号：US08357617B2

公开(公告)日：2013-01-22

申请号：US12371672

申请日：2009-02-16

Applicant: Matt Yeh ,  Shun Wu Lin ,  Chi-Chun Chen ,  Ryan Chia-Jen Chen ,  Yi-Hsing Chen ,  Chien-Hao Chen ,  Donald Y. Chao ,  Kuo-Bin Huang

Inventor： Matt Yeh ,  Shun Wu Lin ,  Chi-Chun Chen ,  Ryan Chia-Jen Chen ,  Yi-Hsing Chen ,  Chien-Hao Chen ,  Donald Y. Chao ,  Kuo-Bin Huang

IPC: H01L21/302

CPC classification number: H01L21/28105 ,  H01L21/28123 ,  H01L21/28158 ,  H01L21/31111 ,  H01L21/32139 ,  H01L29/401

Abstract: Provided are methods of patterning metal gate structures including a high-k gate dielectric. In an embodiment, a soluble hard mask layer may be used to provide a masking element to pattern a metal gate. The soluble hard mask layer may be removed from the substrate by water or a photoresist developer. In an embodiment, a hard mask including a high-k dielectric is formed. In a further embodiment, a protection layer is formed underlying a photoresist pattern. The protection layer may protect one or more layers formed on the substrate from a photoresist stripping process.

公开(公告)号：US20130006617A1

公开(公告)日：2013-01-03

申请号：US13613115

申请日：2012-09-13

Applicant: Ali Soheil Sadri ,  Navin Jaffer ,  Anissim A. Silivra ,  Bin Huang ,  Matthew Plonski

Inventor： Ali Soheil Sadri ,  Navin Jaffer ,  Anissim A. Silivra ,  Bin Huang ,  Matthew Plonski

IPC: G10L19/00

CPC classification number: G10L19/16 ,  G10L19/00

Abstract: Techniques for implementing vocoders in parallel digital signal processors are described. A preferred approach is implemented in conjunction with the BOPS® Manifold Array (ManArray™) processing architecture so that in an array of N parallel processing elements, N channels of voice communication are processed in parallel. Techniques for forcing vocoder processing of one data-frame to take the same number of cycles are described. Improved throughput and lower clock rates can be achieved.

Abstract translation: 描述了在并行数字信号处理器中实现声码器的技术。 优选的方法是结合BOPS®歧管阵列（ManArray TM）处理架构来实现，使得在N个并行处理元件阵列中，并行处理N个通道的语音通信。 描述用于强制一个数据帧的声码器处理以采用相同数量的周期的技术。 可以实现提高吞吐量和降低时钟频率。

公开(公告)号：US08340960B2

公开(公告)日：2012-12-25

申请号：US12485229

申请日：2009-06-16

Applicant: Ali Soheil Sadri ,  Navin Jaffer ,  Anissim A. Silivra ,  Bin Huang ,  Matthew Plonski

Inventor： Ali Soheil Sadri ,  Navin Jaffer ,  Anissim A. Silivra ,  Bin Huang ,  Matthew Plonski

IPC: G10L19/12

CPC classification number: G10L19/16 ,  G10L19/00

Abstract: Techniques for implementing vocoders in parallel digital signal processors are described. A preferred approach is implemented in conjunction with the BOPS® Manifold Array (ManArray™) processing architecture so that in an array of N parallel processing elements, N channels of voice communication are processed in parallel. Techniques for forcing vocoder processing of one data-frame to take the same number of cycles are described. Improved throughput and lower clock rates can be achieved.

Abstract translation: 描述了在并行数字信号处理器中实现声码器的技术。 优选的方法是结合BOPS®歧管阵列（ManArray TM）处理架构来实现，使得在N个并行处理元件阵列中，并行处理N个通道的语音通信。 描述用于强制一个数据帧的声码器处理以采用相同数量的周期的技术。 可以实现提高吞吐量和降低时钟频率。

公开(公告)号：US08330198B2

公开(公告)日：2012-12-11

申请号：US12758252

申请日：2010-04-12

Applicant: Shin Bin Huang ,  Chung-Lin Huang ,  Ching-Nan Hsiao ,  Tzung Han Lee

Inventor： Shin Bin Huang ,  Chung-Lin Huang ,  Ching-Nan Hsiao ,  Tzung Han Lee

IPC: H01L27/108

CPC classification number: H01L27/0259

Abstract: A device for preventing current-leakage is located between a transistor and a capacitor of a memory cell. The two terminals of the device for preventing current-leakage are respectively connected with a slave terminal of the transistor and an electric pole of the capacitor. The device for preventing current-leakage has at least two p-n junctions. The device for preventing current-leakage is a lateral silicon controlled rectifier, a diode for alternating current, or a silicon controlled rectifier. By utilizing the driving characteristic of the device for preventing current-leakage, electric charge stored in the capacitor hardly passes through the device for preventing current-leakage when the transistor is turned off to improve the current-leakage problem.

Abstract translation: 用于防止漏电的装置位于存储单元的晶体管和电容器之间。 用于防止漏电的装置的两个端子分别与晶体管的从端和电容器的电极连接。 用于防止漏电的装置具有至少两个p-n结。 用于防止漏电的装置是侧向可控硅整流器，用于交流电流的二极管或可控硅整流器。 通过利用用于防止漏电的装置的驱动特性，存储在电容器中的电荷几乎不会通过用于防止晶体管截止时漏电的装置，从而改善漏电问题。

公开(公告)号：US08295286B2

公开(公告)日：2012-10-23

申请号：US10750012

申请日：2003-12-31

Applicant: Suresh Rajgopal ,  Lun-bin Huang ,  Nicholas Julian Richardson

Inventor： Suresh Rajgopal ,  Lun-bin Huang ,  Nicholas Julian Richardson

IPC: H04L12/56

CPC classification number: H04L45/00 ,  H04L45/745 ,  H04L45/7453 ,  H04L45/7457 ,  H04L49/25 ,  H04L49/55

Abstract: Internet Protocol address prefixes are hashed into hash tables allocated memory blocks on demand after collisions occur for both a first hash and a single rehash. The number of memory blocks allocated to each hash table is limited, with additional prefixes handled by an overflow content addressable memory. Each hash table contains only prefixes of a particular length, with different hash tables containing prefixes of different lengths. Only a subset of possible prefix lengths are accommodated by the hash tables, with a remainder of prefixes handled by the content addressable memory or a similar alternate address lookup facility.

Abstract translation: 互联网协议地址前缀被哈希表散列成分配的内存块，按照第一个散列和单个重新发生的冲突发生。 分配给每个散列表的存储器块的数量受限制，其中额外的前缀由溢出内容可寻址存储器处理。 每个散列表仅包含特定长度的前缀，不同的散列表包含不同长度的前缀。 只有哈希表容纳可能的前缀长度的一个子集，其余的前缀由内容可寻址存储器或类似的替代地址查找工具处理。

公开(公告)号：US08288224B2

公开(公告)日：2012-10-16

申请号：US12699399

申请日：2010-02-03

Applicant: Shin-Bin Huang ,  Tzung-Han Lee ,  Chung-Lin Huang

Inventor： Shin-Bin Huang ,  Tzung-Han Lee ,  Chung-Lin Huang

IPC: H01L21/8242

CPC classification number: H01L28/92

Abstract: A method for manufacturing capacitor lower electrodes includes a dielectric layer, a first silicon nitride layer and a hard mask layer; partially etching the hard mask layer, the first silicon nitride layer and the dielectric layer to form a plurality of concave portions; depositing a second silicon nitride layer onto the hard mask layer and into the concave portions; partially etching the second silicon nitride layer, the hard mask layer and the dielectric layer to form a plurality of trenches; forming a capacitor lower electrode within each trench and partially etching the first silicon nitride layer, the second silicon nitride layer, the dielectric layer and the capacitor lower electrodes to form an etching area; and etching and removing the dielectric layer from the etching area, thereby a periphery of each capacitor lower electrode is surrounded and attached to by the second silicon nitride layer.

Abstract translation: 制造电容器下电极的方法包括电介质层，第一氮化硅层和硬掩模层; 部分地蚀刻硬掩模层，第一氮化硅层和电介质层以形成多个凹部; 在所述硬掩模层上沉积第二氮化硅层并进入所述凹部; 部分蚀刻第二氮化硅层，硬掩模层和电介质层以形成多个沟槽; 在每个沟槽内形成电容器下电极，并部分地蚀刻第一氮化硅层，第二氮化硅层，电介质层和电容器下电极以形成蚀刻区域; 并且从蚀刻区域蚀刻除去电介质层，由此每个电容器下电极的周围被第二氮化硅层包围并附着。

公开(公告)号：US08275141B2

公开(公告)日：2012-09-25

申请号：US12771024

申请日：2010-04-30

Applicant: Shih-Yu Pan ,  Min-Qiao Lu ,  Jiun-Bin Huang ,  Shyang-Jye Chang

Inventor： Shih-Yu Pan ,  Min-Qiao Lu ,  Jiun-Bin Huang ,  Shyang-Jye Chang

IPC: A61F11/06

CPC classification number: G10L21/0272

Abstract: A noise reduction system and a noise reduction method are provided. The noise reduction system comprises a uni-directional microphone, an omni-directional microphone and a signal processing module. The signal processing module comprises an adaptive noise control (ANC) unit, a main noise reduction unit and an optimizing unit. The uni-directional microphone senses a first audio source to output a first audio signal, and the omni-directional microphone senses a second audio source to output a second audio signal. The ANC unit executes an adaptive noise control to output an estimated signal according to the first audio signal and the second audio signal. The main noise reduction unit executes a main noise reduction process to output a de-noise speech signal according to the estimated signal and the second audio signal. The optimizing unit executes an optimizing process to output an optimized speech signal according to the de-noise speech signal.

Abstract translation: 提供降噪系统和降噪方法。 降噪系统包括单向麦克风，全向麦克风和信号处理模块。 信号处理模块包括自适应噪声控制（ANC）单元，主降噪单元和优化单元。 单向麦克风感测第一音频源以输出第一音频信号，并且全向麦克风感测第二音频源以输出第二音频信号。 ANC单元执行自适应噪声控制，以根据第一音频信号和第二音频信号输出估计信号。 主降噪单元执行主噪声降低处理，以根据估计的信号和第二音频信号输出去噪声语音信号。 优化单元执行优化处理，以根据去噪语音信号输出优化的语音信号。

公开(公告)号：US08268228B2

公开(公告)日：2012-09-18

申请号：US12001777

申请日：2007-12-11

Applicant: Bin Huang ,  David C. Gale ,  Vincent J. Gueriguian

Inventor： Bin Huang ,  David C. Gale ,  Vincent J. Gueriguian

IPC: B29C49/00

CPC classification number: A61F2/91 ,  A61F2/90 ,  B29C49/0005 ,  B29C49/6472 ,  B29C2049/0089 ,  B29K2105/258 ,  B29K2995/006 ,  B29L2031/7542

Abstract: Methods to expand polymer tubing with desirable or optimum morphology and mechanical properties for stent manufacture and fabrication of a stent therefrom are disclosed.

Abstract translation: 公开了扩展聚合物管的方法，其具有用于支架制造和制造支架的所需或最佳形态和机械性能。

公开(公告)号：US20120171260A1

公开(公告)日：2012-07-05

申请号：US13418244

申请日：2012-03-12

Applicant: Bin Huang ,  Lothar W. Kleiner ,  John Stankus

Inventor： Bin Huang ,  Lothar W. Kleiner ,  John Stankus

IPC: A61K9/00 ,  C08L5/08 ,  A61F2/06 ,  A61K47/16 ,  C08L5/12 ,  A61K47/36 ,  C08K5/23

CPC classification number: A61L31/14 ,  A61L2/08 ,  A61L2/081 ,  A61L2/087 ,  A61L29/085 ,  A61L29/16 ,  A61L31/04 ,  A61L31/042 ,  A61L31/10 ,  A61L31/16 ,  A61L2300/30 ,  A61L2300/428

Abstract: Stents and delivery systems with reduced chemical degradation and methods of sterilizing the same are disclosed.

Abstract translation: 公开了具有降低化学降解的支架和递送系统及其灭菌方法。