公开(公告)号：US20080289176A1

公开(公告)日：2008-11-27

申请号：US12146204

申请日：2008-06-25

Applicant: Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

Inventor： Honchin EN ,  Masayuki Hayashi ,  Dongdong Wang ,  Kenichi Shimada ,  Motoo Asai ,  Koji Sekine ,  Tohru Nakai ,  Shinichiro Ichikawa ,  Yukihiko Toyoda

IPC: H05K3/00

CPC classification number: C23G1/10 ,  H01L2924/0002 ,  H05K3/0094 ,  H05K3/062 ,  H05K3/067 ,  H05K3/108 ,  H05K3/384 ,  H05K3/385 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0338 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0307 ,  H05K2203/0315 ,  H05K2203/072 ,  H05K2203/1105 ,  Y10T29/49124 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T428/24917 ,  H01L2924/00

Abstract: The present invention has for its object to provide a multilayer printed circuit board which is very satisfactory in facture toughness, dielectric constant, adhesion and processability, among other characteristics. The present invention is directed to a multilayer printed circuit board comprising a substrate board, a resin insulating layer formed on said board and a conductor circuit constructed on said resin insulating layer, wherein said resin insulating layer comprises a polyolefin resin.

Abstract translation: 本发明的目的在于提供一种多层印刷电路板，其特征在于其具有非常好的韧性，介电常数，粘合性和可加工性。 本发明涉及一种多层印刷电路板，其包括基板，形成在所述基板上的树脂绝缘层和在所述树脂绝缘层上构成的导体电路，其中所述树脂绝缘层包括聚烯烃树脂。

公开(公告)号：US20080277148A1

公开(公告)日：2008-11-13

申请号：US12171794

申请日：2008-07-11

Applicant: Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

Inventor： Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

IPC: H05K1/02

CPC classification number: H05K3/423 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/036 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/381 ,  H05K3/385 ,  H05K3/387 ,  H05K3/388 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0315 ,  H05K2203/0733 ,  H05K2203/0773 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A metal layer 18 is sandwiched between insulating layers 14 and 20 so that required strength is maintained. Hence it follows that the thickness of a core substrate 30 can be reduced and, therefore, the thickness of a multi-layer printed circuit board can be reduced. Formation of non-penetrating openings 22 which reach the metal layer 18 in the insulating layers 14 and 20 is simply required. Therefore, small non-penetrating openings 22 can easily be formed by applying laser beams. Thus, through holes 36 each having a small diameter can be formed.

Abstract translation: 金属层18夹在绝缘层14和20之间，从而保持所需的强度。 因此，可以减小芯基板30的厚度，因此可以减小多层印刷电路板的厚度。 仅仅需要在绝缘层14和20中到达金属层18的非穿透开口22的形成。 因此，通过施加激光束可以容易地形成小的非穿透开口22。 因此，可以形成各自具有小直径的通孔36。

公开(公告)号：US20080169123A1

公开(公告)日：2008-07-17

申请号：US12034193

申请日：2008-02-20

Applicant: Hajime SAKAMOTO ,  Dongdong Wang

Inventor： Hajime SAKAMOTO ,  Dongdong Wang

IPC: H05K1/09 ,  H05K1/16

CPC classification number: H01L23/49838 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/27 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/30107 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09036 ,  H05K2201/09563 ,  H05K2201/096 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49133 ,  Y10T29/49139 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/03

Abstract: An intermediate layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the intermediate layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.

Abstract translation: 中间层38设置在IC芯片20的芯片焊盘22上并且集成到多层印刷电路板10中。 由此，可以不使用引线部件和密封树脂将IC芯片20电连接到多层印刷电路板10。 此外，通过在铝焊盘24上设置由铜制成的中间层38，可以防止焊盘24上的树脂残留，并且改善管芯焊盘24和通孔60之间的连接特性以及可靠性。

公开(公告)号：US20080144298A1

公开(公告)日：2008-06-19

申请号：US12033302

申请日：2008-02-19

Applicant: Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H05K1/18

CPC classification number: H05K1/181 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L24/16 ,  H01L24/17 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/185 ,  H05K1/186 ,  H05K1/187 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 id constituted by provided a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

Abstract translation: 芯片电容器20设置在印刷电路板10的芯基板30中。这使得可以缩短IC芯片90和芯片电容器20之间的距离并减小环路电感。 由于通过以多层方式设置第一树脂基板30a，第二树脂基板30b和第三树脂基板30c构成的芯基板30d，因此芯基板30可以获得足够的强度。

公开(公告)号：US07342803B2

公开(公告)日：2008-03-11

申请号：US10780856

申请日：2004-02-19

Applicant: Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H05K1/18

CPC classification number: H05K1/181 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L24/16 ,  H01L24/17 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/185 ,  H05K1/186 ,  H05K1/187 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makes it possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

Abstract translation: 片状电容器20设置在印刷电路板10的芯基板30中。 这使得可以缩短IC芯片90和芯片电容器20之间的距离并减小环路电感。 由于通过以多层方式设置第一树脂基板30a，第二树脂基板30b和第三树脂基板30c来构成芯基板30，所以可以获得足够的强度。

公开(公告)号：US20080055872A1

公开(公告)日：2008-03-06

申请号：US11928397

申请日：2007-10-30

Applicant: Yasushi INAGAKI ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi INAGAKI ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H05K7/02

CPC classification number: H05K1/115 ,  H01G2/06 ,  H01G4/12 ,  H01G4/224 ,  H01G4/228 ,  H01G4/248 ,  H01G4/40 ,  H01L21/4857 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01046 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/112 ,  H05K1/181 ,  H05K1/183 ,  H05K1/185 ,  H05K1/186 ,  H05K3/4602 ,  H05K2201/09509 ,  H05K2201/09545 ,  H05K2201/096 ,  H05K2201/10015 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611

Abstract: Chip capacitors 20 are provided in a printed circuit board 10. In this manner, the distance between an IC chip 90 and each chip capacitor 20 is shortened, and the loop inductance is reduced. In addition, the chip capacitors 20 are accommodated in a core substrate 30 having a large thickness. Therefore, the thickness of the printed circuit board does not become large.

公开(公告)号：US06724638B1

公开(公告)日：2004-04-20

申请号：US09830360

申请日：2001-04-25

Applicant: Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

Inventor： Yasushi Inagaki ,  Motoo Asai ,  Dongdong Wang ,  Hideo Yabashi ,  Seiji Shirai

IPC: H05K118

CPC classification number: H05K1/181 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L23/645 ,  H01L24/16 ,  H01L24/17 ,  H01L25/16 ,  H01L25/162 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/185 ,  H05K1/186 ,  H05K1/187 ,  H05K3/4602 ,  H05K3/4611 ,  H05K2201/0187 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A chip capacitor 20 is provided in a core substrate 30 of a printed circuit board 10. This makesit possible to shorten a distance between an IC chip 90 and the chip capacitor 20 and to reduce loop inductance. Since the core substrate 30 is constituted by providing a first resin substrate 30a, a second resin substrate 30b and a third resin substrate 30c in a multilayer manner, the core substrate 30 can obtain sufficient strength.

Abstract translation: 片状电容器20设置在印刷电路板10的芯基板30中。这样可以缩短IC芯片90和芯片电容器20之间的距离并减小环路电感。 由于通过以多层方式设置第一树脂基板30a，第二树脂基板30b和第三树脂基板30c来构成芯基板30，所以可以获得足够的强度。

公开(公告)号：US08822830B2

公开(公告)日：2014-09-02

申请号：US13432471

申请日：2012-03-28

Applicant: Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

Inventor： Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

IPC: H05K1/03

CPC classification number: H05K3/423 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/036 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/381 ,  H05K3/385 ,  H05K3/387 ,  H05K3/388 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0315 ,  H05K2203/0733 ,  H05K2203/0773 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A multi-layer printed circuit board including a first insulating layer, a first conductor layer having circuits on one surface of the first insulating layer, a second conductor layer having circuits on the opposite surface of the first insulating layer, a second insulating layer on the second conductor and first insulating layers, and a third conductor layer having circuits on the second insulating layer on the opposite side of the second conductor layer. The first and second insulating layers have first and second via holes formed in openings of the first and second insulating layers and made of conductive materials filling the openings such that circuits in the first and third conductor layers are connected to one or more circuits in the second conductor layer, and the first and second via holes have bottom ends facing the second conductor layer and top ends larger than the bottom ends.

Abstract translation: 一种多层印刷电路板，包括第一绝缘层，在第一绝缘层的一个表面上具有电路的第一导体层，在第一绝缘层的相对表面上具有电路的第二导体层，第二绝缘层， 第二导体和第一绝缘层，以及在第二导体层的相对侧的第二绝缘层上具有电路的第三导体层。 第一和第二绝缘层具有形成在第一和第二绝缘层的开口中的第一和第二通孔，并由填充开口的导电材料制成，使得第一和第三导体层中的电路连接到第二和第二绝缘层中的一个或多个电路 导体层，第一和第二通孔具有面向第二导体层的底端，并且顶端大于底端。

公开(公告)号：US08782882B2

公开(公告)日：2014-07-22

申请号：US13169736

申请日：2011-06-27

Applicant: Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

Inventor： Motoo Asai ,  Dongdong Wang ,  Takahiro Mori

IPC: H01K3/10

CPC classification number: H05K3/423 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K1/036 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/181 ,  H05K3/381 ,  H05K3/385 ,  H05K3/387 ,  H05K3/388 ,  H05K3/426 ,  H05K3/427 ,  H05K3/4602 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09881 ,  H05K2203/0315 ,  H05K2203/0733 ,  H05K2203/0773 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A method of manufacturing a printed circuit board includes the following steps (A) to (D). (A) Laminating a resin insulating layer on each of two sides of a core member to form a core substrate, (B) forming penetrating openings in the core substrate by applying laser beams, (C) forming a rough surface on the core substrate, and (D) providing a metal film for each penetrating opening to form through holes.

Abstract translation: 制造印刷电路板的方法包括以下步骤（A）至（D）。 （A）在芯部件的两侧各自层叠树脂绝缘层，形成芯基板，（B）通过施加激光而在芯基板上形成贯通孔，（C）在芯基板上形成粗糙面， 和（D）为每个穿透孔提供金属膜以形成通孔。

公开(公告)号：US08705907B2

公开(公告)日：2014-04-22

申请号：US13038421

申请日：2011-03-02

Applicant: Dongdong Wang ,  Zhenhua Shao ,  Xu Huang ,  Masataka Ito ,  Christopher Lee Keller

Inventor： Dongdong Wang ,  Zhenhua Shao ,  Xu Huang ,  Masataka Ito ,  Christopher Lee Keller

IPC: G02B6/10 ,  H04B10/00

CPC classification number: G02B6/43 ,  G02B6/1221 ,  G02B6/4214 ,  G02B6/4224 ,  H01L25/167 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  Y10T29/49016 ,  H01L2224/0401

Abstract: An optical interconnect device includes a first substrate, a second substrate, an optical waveguide, an electrical wiring and a switching device. The first substrate has an electrical wiring circuit, an electrical-optical converter for converting an electrical signal to an optical signal, and a light emitting device for emitting a light. The second substrate has an electrical wiring circuit, an optical-electrical converter for converting the optical signal to the electrical signal, and a light receiving device for receiving the light from the light emitted device. The optical waveguide optically connects the light emitting and light receiving devices. The electrical wiring electrically connects the electrical wiring circuits of the first and second substrates. The switching device determines a fast signal of data to be transmitted via the optical substrate and a slow signal of data to be transmitted via the electrical wiring.

Abstract translation: 光学互连装置包括第一基板，第二基板，光波导，电线和开关装置。 第一基板具有电布线电路，用于将电信号转换为光信号的电光转换器，以及用于发光的发光装置。 第二基板具有电线电路，用于将光信号转换为电信号的光电转换器，以及用于从光发射装置接收光的光接收装置。 光波导将发光和光接收装置光学连接。 电线将第一和第二基板的电气布线电连接。 开关装置确定要通过光学基板发送的数据的快速信号和经由电线发送的数据的慢信号。