METHOD FOR FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR PACKAGE WITH REDUCED METAL BURRS

    公开(公告)号:US20240347477A1

    公开(公告)日:2024-10-17

    申请号:US18633538

    申请日:2024-04-12

    CPC classification number: H01L23/552 H01L21/56

    Abstract: A method for forming a shielding layer over a semiconductor package is provided. The method comprises: providing a jig having a metal frame and a carrier tape attached onto the metal frame via an adhesive layer; forming an opening through the adhesive layer and the carrier tape; disposing a semiconductor package on the jig over the opening such that the semiconductor package is supported on and attached to the carrier tape via the adhesive layer; forming a groove in the adhesive layer and around the opening by isotropic etching; forming a shielding layer over the semiconductor package and the jig; and removing the semiconductor package with the shielding layer from the jig.

    System and Method of Providing FOUP or Cassette Supporting Structure for Handling Various Size or Shape Wafers and Panels

    公开(公告)号:US20240332051A1

    公开(公告)日:2024-10-03

    申请号:US18193820

    申请日:2023-03-31

    CPC classification number: H01L21/67383 H01L21/67294

    Abstract: A front opening unified pod has a housing and a plurality of horizontal support members disposed within the housing and adapted to accommodate a plurality of semiconductor wafers or panels. The plurality of semiconductor wafers or panels have a different size or shape, such as circular and rectangular. A first one of the plurality of horizontal support members has a wing to support the plurality of different size or shape semiconductor wafers or panels. The plurality of horizontal support members has a first side horizontal support member, a second side horizontal support member, and a center horizontal support member disposed between the first side horizontal support member and the second side horizontal support member. The plurality of horizontal support members is insertable into the housing. One or more of the plurality of horizontal support members has an opening for laser identification.

    Semiconductor Device and Method of Forming Graphene Core Shell Embedded Within Shielding Layer

    公开(公告)号:US20240128200A1

    公开(公告)日:2024-04-18

    申请号:US18046028

    申请日:2022-10-12

    CPC classification number: H01L23/552 H01L21/56 H01L23/3128 H01L23/5383

    Abstract: A semiconductor device has a substrate and an electrical component disposed over the substrate. An encapsulant is deposited over the electrical component and substrate. A shielding layer has a graphene core shell formed on a surface of the encapsulant. The shielding layer can be printed on the encapsulant. The graphene core shell includes a copper core. The shielding layer has a plurality of cores covered by graphene and the graphene is interconnected within the shielding layer to form an electrical path. The shielding layer also has thermoset material or polymer or composite epoxy type matrix and the graphene core shell is embedded within the matrix. A shielding material can be disposed around the electrical component. The electrical path dissipates any charge incident on shielding layer, such as an ESD event, to reduce or inhibit the effects of EMI, RFI, and other inter-device interference.

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