公开(公告)号：US20050083129A1

公开(公告)日：2005-04-21

申请号：US10960097

申请日：2004-10-08

Applicant: Hirokazu Tsurumaki ,  Hiroyuki Nagai ,  Tomio Furuya ,  Makoto Ishikawa

Inventor： Hirokazu Tsurumaki ,  Hiroyuki Nagai ,  Tomio Furuya ,  Makoto Ishikawa

IPC: H03F1/30 ,  H03G1/00 ,  H03G3/10

CPC classification number: H03G1/0005 ,  H03F1/301 ,  H03F2200/294 ,  H03F2200/372 ,  H03G2201/103 ,  H03G2201/206 ,  H03G2201/307 ,  H03G2201/40

Abstract: In a high frequency power amplifier circuit that supplies a bias to an amplifying FET by a current mirror method, scattering of a threshold voltage Vth due to the scattering of the channel impurity concentration of the FET, and a shift of a bias point caused by the scattering of the threshold voltage Vth and a channel length modulation coefficient λ due to a short channel effect are corrected automatically. The scattering of a high frequency power amplifying characteristic can be reduced as a result.

Abstract translation: 在通过电流镜法向放大FET提供偏置的高频功率放大器电路中，由于FET的沟道杂质浓度的散射引起的阈值电压Vth的散射和由 自动校正阈值电压Vth的散射和由于短通道效应引起的通道长度调制系数λ。 结果可以降低高频功率放大特性的散射。

公开(公告)号：US20050079835A1

公开(公告)日：2005-04-14

申请号：US10505084

申请日：2003-10-02

Applicant: Shinichiro Takabayashi ,  Masato Ukena ,  Masayuki Orihashi ,  Michiaki Matsuo

Inventor： Shinichiro Takabayashi ,  Masato Ukena ,  Masayuki Orihashi ,  Michiaki Matsuo

IPC: H03F1/02 ,  H03F1/32 ,  H03G3/30 ,  H04B1/04 ,  H01Q11/12 ,  H03C1/62 ,  H04B17/00

CPC classification number: H03G3/3042 ,  H03F1/0211 ,  H03F1/025 ,  H03F1/0255 ,  H03F1/32 ,  H03F1/3247 ,  H03F1/3282 ,  H03F1/34 ,  H03F3/24 ,  H03F2200/102 ,  H03G2201/103 ,  H03G2201/206 ,  H03G2201/307 ,  H04B1/0475 ,  H04B2001/0416 ,  H04B2001/0433

Abstract: A transmitting method and a transmitter apparatus, which need no manual adjustment, are disclosed. A delay amount of a delay means is automatically adjusted such that an out-of-band distortion component of a transmission signal is minimized, and a correct timing is produced by the method and the apparatus. In this transmitter apparatus, a first delay means adjusts a control timing over a voltage that controls a power amplifying means, and a distributor distributes an output from the power amplifying means in order to feedback parts of the output. A distortion adjusting means calculates a distortion component of the transmission signal by using the signal fed back by the distributor, and adjusts automatically a delay amount of the first delay means so as to minimize the distortion component. This structure allows eliminating manual adjustment, and obtaining high power-efficiency with fewer distortions.

Abstract translation: 公开了不需要手动调整的发送方法和发送装置。 自动调整延迟装置的延迟量，使得发送信号的带外失真分量最小化，并且通过该方法和装置产生正确的定时。 在该发射机装置中，第一延迟装置调节控制功率放大装置的电压的控制定时，并且分配器分配来自功率放大装置的输出，以反馈输出部分。 失真调整装置通过使用由分配器反馈的信号来计算发送信号的失真分量，并且自动调整第一延迟装置的延迟量，以使失真分量最小化。 这种结构允许消除手动调整，并且以较少的失真获得高功率效率。

公开(公告)号：US20040162104A1

公开(公告)日：2004-08-19

申请号：US10713613

申请日：2003-11-14

Applicant: InterDigital Technology Corporation

Inventor： Fatih Ozluturk ,  Leonid Kazakevich ,  Kenneth P. Kearney ,  Geetha Lakshmi Narayan ,  Alpaslan Demir ,  Tanbir Haque

IPC: H04B001/40 ,  H04B017/00 ,  H04B001/06 ,  H04B007/00

CPC classification number: H03G3/001 ,  H03D3/008 ,  H03D3/009 ,  H03G3/3068 ,  H03G3/3089 ,  H03G2201/103 ,  H03G2201/202 ,  H03G2201/302 ,  H03G2201/307 ,  H03G2201/508 ,  H04B1/30 ,  H04L2027/0016 ,  H04L2027/0024

Abstract: In order to compensate for performance degradation caused by inferior low-cost analog radio component tolerances of an analog radio, a future system architecture (FSA) wireless communication transceiver employs numerous digital signal processing (DSP) techniques to compensate for deficiencies of such analog components so that modern specifications may be relaxed. Automatic gain control (AGC) functions are provided in the digital domain, so as to provide enhanced phase and amplitude compensation, as well as many other radio frequency (RF) parameters.

Abstract translation: 为了补偿由模拟无线电的低成本模拟无线电组件公差引起的性能下降，未来的系统架构（FSA）无线通信收发器采用多种数字信号处理（DSP）技术来补偿这种模拟组件的缺陷， 现代规格可能放宽。 在数字域中提供自动增益控制（AGC）功能，以提供增强的相位和幅度补偿以及许多其他射频（RF）参数。

公开(公告)号：US06674999B2

公开(公告)日：2004-01-06

申请号：US09811082

申请日：2001-03-16

Applicant: Balasubramanian Ramachandran

Inventor： Balasubramanian Ramachandran

IPC: H04Q720

CPC classification number: H04W52/267 ,  H03G3/004 ,  H03G3/3042 ,  H03G2201/103 ,  H03G2201/307 ,  H03G2201/40 ,  H03G2201/508 ,  H04B1/109 ,  H04L1/0001 ,  H04W52/08 ,  H04W52/38

Abstract: A dynamically varying linearity system “DVLS” capable of varying the linearity of a radio frequency (RF) front-end of a communication device responsive to receiving a condition signal indicating a desired mode of operation of a transmitter. The DVLS may include a condition signal indicative of the desired mode of operation and a controller that adjusts the linearity of the transmitter responsive to the condition signal. The condition signal may be responsive to a user interface. The controller, responsive to the condition signal, may dynamically adjust the operating current of the transmitter.

Abstract translation: 一种动态变化的线性系统“DVLS”，其能够响应于接收到指示发射机的所需操作模式的条件信号而改变通信设备的射频（RF）前端的线性度。 DVLS可以包括指示期望的操作模式的条件信号和响应于条件信号来调整发射机的线性度的控制器。 条件信号可以响应于用户界面。 控制器响应于条件信号，可以动态地调整发射机的工作电流。

公开(公告)号：US06303922B1

公开(公告)日：2001-10-16

申请号：US09120388

申请日：1998-07-21

Applicant: Bryon L. Kasper

Inventor： Bryon L. Kasper

IPC: H01J4014

CPC classification number: H03G9/16 ,  H03F3/087 ,  H03G1/0088 ,  H03G3/3084 ,  H03G2201/103 ,  H03G2201/502

Abstract: At least two innovations are used to overcome the limitations of conventional transimpedance or high impedance optical receiver front end amplifiers. The innovations are a) multiple stage equalization of a high-feedback resistor, low-gain transimpedance amplifier to obtain high sensitivity, and b) range switching of feedback resistors and equalization capacitors to obtain high overload. With these approaches, it is possible to design an optical receiver operating at the intrinsic limits of available device technology.

Abstract translation: 使用至少两个创新来克服常规跨阻抗或高阻抗光接收机前端放大器的限制。 创新是a）高反馈电阻，低增益互阻抗放大器的多级均衡以获得高灵敏度，以及b）反馈电阻和均衡电容的范围切换以获得高过载。 利用这些方法，可以设计在可用设备技术的固有极限下操作的光接收机。

公开(公告)号：US20240333228A1

公开(公告)日：2024-10-03

申请号：US18621706

申请日：2024-03-29

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Shohei IMAI ,  Tetsurou ASHIDA

IPC: H03F1/02 ,  H03F3/21 ,  H03G3/30

CPC classification number: H03F1/0288 ,  H03F3/211 ,  H03G3/3042 ,  H03G2201/103

Abstract: A Doherty amplifier circuit includes a first integrated circuit and a second integrated circuit connected to the first integrated circuit. One of the first integrated circuit and the second integrated circuit includes a carrier amplifier that amplifies a radio-frequency signal, a peak amplifier that amplifies the radio-frequency signal, a variable gain control circuit that controls a gain of the radio-frequency signal based on a drive level signal that indicates a drive level of the carrier amplifier, and a bias circuit that inputs a bias based on an output from the variable gain control circuit to the peak amplifier. The first integrated circuit on a silicon die includes at least the variable gain control circuit.

公开(公告)号：US20240313733A1

公开(公告)日：2024-09-19

申请号：US18184037

申请日：2023-03-15

Applicant: MOCON, INC.

Inventor： Charles Willcox ,  David Jennings ,  Christopher Fields

IPC: H03G3/30

CPC classification number: H03G3/3084 ,  H03G3/3036 ,  H03G2201/103

Abstract: A photoionization detector sensor equipped with an adjustable gain amplifier, and method of standardizing output of the photoionization detector sensor by adjusting the gain so that an actual test value expected to produce a known anticipated value matches the anticipated value.

公开(公告)号：US12088269B2

公开(公告)日：2024-09-10

申请号：US17382838

申请日：2021-07-22

Applicant: Intelligent Fusion Technology, Inc.

Inventor： Xingyu Xiang ,  Dan Shen ,  Genshe Chen ,  Khanh Pham

IPC: H03G3/30 ,  H03F3/21

CPC classification number: H03G3/3089 ,  H03F3/21 ,  H03G2201/103

Abstract: Embodiments of the present disclosure provide a method, a device, and a storage medium for hybrid automatic gain control in a communication system. The method includes amplifying an input signal to generate an amplified signal which is converted into a plurality of output signals; obtaining a moving average amplitude of a plurality of output signals of a current input signal; and calculating a signal amplitude difference according to the moving average amplitude and a desired output signal amplitude level; calculating a signal amplitude ratio according to a plurality of output signals of two previous output signal blocks and AGC gains corresponding to the plurality of output signals of the two previous output signal blocks; obtaining a step size according to the signal amplitude difference and the signal amplitude ratio; and calculating an AGC gain of the current input signal according to the step size and a corresponding previous AGC gain.

公开(公告)号：US12068749B2

公开(公告)日：2024-08-20

申请号：US18203810

申请日：2023-05-31

Applicant: Reach Power, Inc.

Inventor： Asmita Dani ,  Christopher Joseph Davlantes

IPC: H03K3/01 ,  H02M7/217 ,  H03F3/19 ,  H03G3/30 ,  H03K3/012

CPC classification number: H03K3/012 ,  H02M7/217 ,  H03F3/19 ,  H03G3/3036 ,  H03F2200/451 ,  H03G2201/103 ,  H03G2201/307

Abstract: A bidirectional RF circuit, preferably including a plurality of terminals, a switch, a transistor, a coupler, and a feedback network. The circuit can optionally include a drain matching network, an input matching network, and/or one or more tuning inputs. In some variations, the circuit can optionally include one or more impedance networks, such as an impedance network used in place of the feedback network; in some such variations, the circuit may not include a coupler, switch, and/or input matching network. A method for circuit operation, preferably including operating in an amplifier mode, operating in a rectifier mode, and/or transitioning between operation modes.

公开(公告)号：US20240267013A1

公开(公告)日：2024-08-08

申请号：US18616377

申请日：2024-03-26

Applicant: KABUSHIKI KAISHA TOSHIBA ,  TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION

Inventor： Hideaki MAJIMA

IPC: H03F3/45 ,  H01P1/36 ,  H03G3/30 ,  H03K5/24

CPC classification number: H03F3/45475 ,  H01P1/36 ,  H03G3/30 ,  H03K5/24 ,  H03F2200/375 ,  H03G2201/103

Abstract: According to one embodiment, a signal processing circuit includes a first voltage setting circuit that sets a reference voltage on an input side of an isolator, a variable gain amplifier circuit that amplifies an output signal of the isolator, a DC offset adjustment circuit that adjusts an offset of the variable gain amplifier circuit, a second voltage setting circuit that sets a reference voltage on an output side of the isolator, and a control circuit that controls the DC offset adjustment circuit in response to a result of comparison of an output voltage of the variable gain amplifier circuit with an output voltage of the second voltage setting circuit.