Abstract:
A silicon nitride substrate comprises a substrate comprising a silicon nitride sintered body, and a plurality of granular bodies containing silicon and integrated to a principal surface of the substrate, wherein a plurality of needle crystals or column crystals comprising mainly silicon nitride are extended from a portion of the granular bodies. A brazing material is applied to a principal surface of the substrate, and a circuit member and a heat radiation member are arranged on the applied brazing material, and bonded by heating. Because of a plurality of granular bodies integrated to the principal surface of the substrate, and a plurality of the needle crystals or the column crystals extended from a portion of the granular bodies, a high anchor effect is produced so that the circuit member and the heat radiation member are firmly bonded to the silicon nitride substrate.
Abstract:
There is provided a hard-to-sinter constraining green sheet and a method of manufacturing a multilayer ceramic substrate using the same. The hard-to-sinter constraining green sheet disposed at least one of top and bottom surfaces of a non-sintered multi-layer ceramic substrate, the hard-to-sinter constraining green sheet including: a first constraining layer having a surface to be positioned on the multi-layer ceramic substrate, the first constraining layer including a first organic binder and a first inorganic powder having a spherical shape or a quasi-spherical shape; and a second constraining layer bonded to a top surface of the first constraining layer and including a second organic binder and a second inorganic powder having a flake shape, the second constraining layer having a powder packing density lower than that of the first constraining layer.
Abstract:
Provided, are multi-layer chip carriers comprising an asymmetric cross-linked polymeric dielectric film, and processes for making the chip carriers.
Abstract:
There is provided a multilayer ceramic substrate including a conductive via of a dual-layer structure capable of preventing loss in electrical conductivity and signal. The multilayer ceramic substrate includes: a plurality of dielectric layers; and a circuit pattern part formed on at least a portion of the dielectric layers, the circuit pattern part including at least one conductive via and conductive pattern, wherein the at least one conductive via comprises an outer peripheral portion and an inner peripheral portion, the outer peripheral portion formed along an inner wall of a via hole extending through the dielectric layers and formed of a first conductive material containing a metal, and the inner peripheral portion filled in the outer peripheral portion and formed of a second conductive material having a shrinkage initiation temperature higher than a shrinkage initiation temperature of the first conductive material.
Abstract:
A printed wiring board including an insulative material, a first conductive circuit formed on the insulative material, a resin insulation layer including a first insulation layer formed on the insulative material and on the first conductive circuit and which insulates between lines of the first conductive circuit, the first insulation layer including inorganic particles having a first average diameter, and a second insulation layer formed on the first insulation layer and including a recessed portion and an opening portion, the second insulation layer including inorganic particles having a second average diameter smaller than the first average diameter, a second conductive circuit formed in the recessed portion, and a via conductor formed in the opening portion and which connects the first conductive circuit to the second conductive circuit.
Abstract:
A joint structure of the present invention includes a conductive member containing copper as a major component thereof, an electrode member containing copper as a major component thereof, and a joint portion formed by fusion welding the conductive member and the electrode member with a brazing material containing tin as a major component thereof and containing substantially no copper, wherein the amount of copper atoms contained in the alloy in the central part of the joint portion is higher than that in the outer circumference part.
Abstract:
Cross-linked polymeric films suitable for use as a dielectric build-up layer in multi-layer chip carriers are provided. The films are suitable for use in any application using films that are dimensionally stable to temperature changes.
Abstract:
Microelectronic and optoelectronic packaging embodiments are described with underfill materials including polybenzoxazine, having the general formula:
Abstract:
A system and method for encapsulating and protecting a component assembly is disclosed. A barrier system comprising a first layer having a first set of physical properties and a second layer having a second set of physical properties is adapted to protectively surround the component assembly. A continuous transitory material is formed between the first layer and the second layer at associated first and second margin portions such that the first layer and the second layer are not prone to delamination. The physical properties of each layer of the barrier system provide protection to the component assembly from various types of physical and environmental damage.
Abstract:
Microelectronic and optoelectronic packaging embodiments are described with underfill materials including polybenzoxazine, having the general formula: