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公开(公告)号:US20240306308A1
公开(公告)日:2024-09-12
申请号:US18650160
申请日:2024-04-30
Applicant: RESONAC CORPORATION
Inventor: Masaya TOBA , Kazuhiko KURAFUCHI , Takashi MASUKO , Kazuyuki MITSUKURA , Shinichiro ABE
CPC classification number: H05K3/181 , C23C18/1605 , C23C18/165 , C23C18/20 , C23C18/32 , C23C18/38 , H05K1/032 , H05K2201/068
Abstract: A semiconductor package includes a wiring board and a semiconductor element mounted on the wiring board. The wiring board includes a first insulating material layer having a surface with an arithmetic average roughness Ra of 100 nm or less, a metal wiring provided on the surface of the first insulating material layer, and a second insulating material layer provided to cover the metal wiring. The metal wiring is configured by a metal layer in contact with the surface of the first insulating material layer and a conductive part stacked on a surface of the metal layer, and a nickel content rate of the metal layer is 0.25 to 20% by mass.
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公开(公告)号:US12076971B2
公开(公告)日:2024-09-03
申请号:US17041884
申请日:2019-03-27
Applicant: CORNING INCORPORATED
Inventor: Jin Su Kim , Dean Michael Thelen
IPC: B32B7/027 , B32B17/06 , C03C3/087 , C03C3/091 , C03C3/093 , C03C4/18 , C03C10/00 , C03C21/00 , H05K1/02 , H05K1/03
CPC classification number: B32B7/027 , B32B17/06 , C03C3/087 , C03C3/091 , C03C3/093 , C03C4/18 , C03C10/0009 , C03C10/0054 , H05K1/024 , H05K1/0306 , B32B2307/30 , B32B2307/732 , B32B2457/00 , C03C21/002 , C03C2204/00 , H05K2201/017 , H05K2201/0191 , H05K2201/068
Abstract: A laminated glass structure for an electronic device includes: a core glass layer having a first coefficient of thermal expansion (CTE); and a plurality of clad glass layers, each having a CTE that is lower than or equal to the first CTE of the core glass layer. A first of the clad glass layers is laminated to a first surface of the core glass layer and a second of the clad layers is laminated to a second surface of the core glass layer. Further, the total thickness of the core glass layer and the clad glass layers ranges from about 0.1 mm to about 3 mm. In addition, each of the first of the clad layers and the core glass layer comprises a loss tangent of 0.006 or less for signals having a frequency of 1 GHz to about 100 GHz.
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公开(公告)号:US12052818B2
公开(公告)日:2024-07-30
申请号:US17898548
申请日:2022-08-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Atsushi Kasuya , Tomohiko Naruoka , Noriaki Okuda , Kosuke Nishio , Nobuo Ikemoto
CPC classification number: H05K1/036 , H05K1/0201 , H05K1/0215 , H05K3/0064 , H05K2201/0129 , H05K2201/0141 , H05K2201/015 , H05K2201/0323 , H05K2201/068
Abstract: A resin multilayer substrate includes a multilayer body including resin base-material layers laminated in a thickness direction and a circuit conductor therein, an end-surface ground conductor provided directly on each end surface of the multilayer body in the thickness direction, an adhesion layer on a side surface of the multilayer body, and a side-surface ground conductor on the adhesion layer. The end-surface and side-surface ground conductors are made of a ground conductor material with a coefficient of thermal expansion whose difference from a coefficient of thermal expansion of the resin base-material layers in a plane direction is smaller than a difference from a coefficient of thermal expansion of the resin base-material layers in the thickness direction. The adhesion layer is made of a material with higher adhesiveness to the side surface of the multilayer body than adhesiveness of the ground conductor material.
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公开(公告)号:US20240224426A1
公开(公告)日:2024-07-04
申请号:US18604992
申请日:2024-03-14
Applicant: TOPPAN HOLDINGS INC.
Inventor: Yuki UMEMURA , Takehisa TAKADA , Tomoyuki ISHII
CPC classification number: H05K1/162 , H05K1/0306 , H05K1/115 , H05K2201/068 , H05K2201/09536 , H05K2201/0959 , H05K2201/09827
Abstract: A component (capacitor) of the high-frequency circuit provided on a first surface of the glass substrate, and the bottom of the through hole in the glass substrate on the first surface have an overlapping part on the first surface. As a result, the capacitor is formed directly above the via, that is, the through hole, thereby eliminating the need for conductive wiring from the via to the capacitor. In addition, by forming a capacitor on a very flat glass substrate before forming the through hole, and forming the through hole after that, it is possible to stably form the capacitor.
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公开(公告)号:US20240074042A1
公开(公告)日:2024-02-29
申请号:US18494849
申请日:2023-10-26
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Yulong Wu , Weiqiang Li
CPC classification number: H05K1/0271 , H05K1/181 , H05K2201/044 , H05K2201/068 , H05K2201/10598
Abstract: The technology of this application relates to a circuit board assembly and an electronic device. The circuit board assembly is applied to the electronic device, and the circuit board assembly includes a circuit board carrying a large-sized chip and a substrate. The substrate is disposed on a side that is of the circuit board and that faces away from the chip, and is connected to the circuit board. In this application, a deformation manner of the circuit board assembly is designed, to effectively reduce impact of a stress generated by deformation of the substrate on self-deformation of the circuit board, and improve a long-term temperature cycle fatigue life of a solder joint between the chip and the circuit board.
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公开(公告)号:US20230284376A1
公开(公告)日:2023-09-07
申请号:US17662432
申请日:2022-05-08
Applicant: Unimicron Technology Corp.
Inventor: Chun-Hung KUO
CPC classification number: H05K1/0271 , H05K1/181 , H05K1/115 , H05K3/32 , H05K3/40 , H05K2201/068 , H05K2201/10378
Abstract: An electronic circuit assembly includes an interposer substrate, a wiring substrate, an electrical connective part and an electronic component. The interposer substrate with a first coefficient of thermal expansion (CTE) includes a first surface, a second surface opposite to the first surface, and a first side surface connecting to the first surface and the second surface. The wiring substrate with a second CTE is disposed below the second surface. The first CTE is lower than the second CTE. The electrical connective part is disposed in the interposer substrate and extends to the first side surface. The electronic component is attached to the first side surface and is electrically connected to the electrical connective part.
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公开(公告)号:US11711886B2
公开(公告)日:2023-07-25
申请号:US17448059
申请日:2021-09-20
Applicant: Magna Electronics Inc.
Inventor: Steven V. Byrne , Yuesheng Lu , Rene Dreiocker , Jonathan D. Conger
CPC classification number: H05K1/0203 , B60R11/04 , G02B7/028 , H04N23/51 , H04N23/55 , H04N23/57 , B60R1/00 , B60R1/12 , B60R2001/1215 , B60R2300/105 , H05K2201/068 , H05K2201/10121
Abstract: A vehicular camera module includes a front camera housing portion having an imager, a lens having a plurality of optical elements, and an imager printed circuit board. The imager is disposed at a front side of the imager printed circuit board and the lens is optically aligned with the imager. A rear camera housing portion is mated with the front camera housing portion to form a camera housing. A thermal element is disposed between the imager printed circuit board and the camera housing. The thermal element has a coefficient of thermal expansion (CTE) of 13 ppm/° C. or less. With the vehicular camera module disposed at a vehicle, circuitry of the vehicular camera module is in electrical connection with a wire harness of the vehicle.
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公开(公告)号:US11659665B2
公开(公告)日:2023-05-23
申请号:US17217264
申请日:2021-03-30
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor: Ho Hyung Ham , Won Seok Lee , Jae Sung Sim
IPC: H05K1/18 , H01L23/538 , H05K1/11
CPC classification number: H05K1/186 , H01L23/5383 , H01L23/5385 , H05K1/119 , H05K1/181 , H05K2201/068 , H05K2201/09827 , H05K2201/10378 , H05K2201/10522
Abstract: A connection structure-embedded substrate includes: a printed circuit board including a plurality of first insulating layers of which at least one has a cavity provided therein, a plurality of first wiring layers disposed as at least one of an outer portion and an inner portion of the plurality of first insulating layers, and a first build-up insulating layer disposed on an upper surface of the plurality of first insulating layers; and a connection structure at least partially disposed in the cavity. The first build-up insulating layer is disposed in the cavity, and each of a lower surface of the connection structure and a lower surface of the cavity is in contact with at least a portion of the first build-up insulating layer, respectively.
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公开(公告)号:US20190254157A1
公开(公告)日:2019-08-15
申请号:US16341997
申请日:2017-10-12
Applicant: CPT GROUP GMBH
Inventor: AURELIAN KOTLAR
CPC classification number: H05K1/0204 , H05K7/205 , H05K2201/0187 , H05K2201/068 , H05K2201/09054
Abstract: A mounting assembly includes an electronic component mounted on an upper surface of a circuit board and having at least one electrical connector and a thermal pad provided on a lower surface of the component. The circuit board is mounted on a heatsink and provided with an opening beneath the thermal pad of the component. The heatsink has a heatsink extension which extends through the circuit board and is spatially separated therefrom. A thermal interface material is provided to ensure an electrically insulating thermal connection between the thermal pad and the heatsink extension.
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公开(公告)号:US20180302982A1
公开(公告)日:2018-10-18
申请号:US15951808
申请日:2018-04-12
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Sumiyo Nakamura , Takahiro Sumi , Takahiro Oka
IPC: H05K1/03 , C04B35/626 , C04B35/622 , C04B35/20 , C04B35/195 , H05K1/02 , H05K3/12 , H05K1/11
CPC classification number: H05K1/0306 , C04B35/195 , C04B35/20 , C04B35/62218 , C04B35/62625 , C04B2235/3215 , C04B2235/3217 , C04B2235/3481 , C04B2235/36 , C04B2235/80 , H01L21/4867 , H01L23/12 , H01L23/15 , H01L23/49822 , H01L23/49838 , H01L2924/0002 , H05K1/0298 , H05K1/111 , H05K1/115 , H05K3/1291 , H05K3/4629 , H05K2201/017 , H05K2201/0209 , H05K2201/068 , H05K2201/09563 , H05K2201/099 , H05K2201/09909 , Y02P70/611 , H01L2924/00
Abstract: Provided are an insulating ceramic paste, a ceramic electronic component, and a method for producing the ceramic electronic component that allow prevention of solder shorts between narrow-pitch terminal electrodes and suppression of generation of cracks in an insulator covering a portion of terminal electrodes during a firing step. The ceramic electronic component includes a ceramic multilayer substrate, terminal electrodes formed on a surface of the ceramic multilayer substrate, and an insulating ceramic film formed on the surface of the ceramic multilayer substrate so as to cover a portion of the terminal electrodes. An exposed surface portion (celsian-crystal-rich layer) of the insulating ceramic film has a thermal expansion coefficient that is lower than the thermal expansion coefficient of the ceramic multilayer substrate.
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