公开(公告)号：US07638885B2

公开(公告)日：2009-12-29

申请号：US12037203

申请日：2008-02-26

Applicant: Hoi-Jun Yoo ,  Yongsang Kim ,  Hyejung Kim

Inventor： Hoi-Jun Yoo ,  Yongsang Kim ,  Hyejung Kim

IPC: H01L23/49 ,  H01L21/56

CPC classification number: H01L23/3121 ,  H01L23/14 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/81801 ,  H01L2224/85 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/038 ,  H05K3/143 ,  H05K3/326 ,  H05K2201/029 ,  H05K2201/10287 ,  H05K2203/0221 ,  H01L2224/83851 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A fabric type semiconductor device package is provided. The fabric type semiconductor device package comprises a fabric type printed circuit board comprising a fabric and a lead unit formed by patterning a conductive material on the fabric, a semiconductor device comprising an electrode unit bonded to the lead unit of the fabric type printed circuit board, and a molding unit for sealing the fabric type printed circuit board and the semiconductor device. In the fabric type semiconductor device package according to the present invention, a fabric type printed circuit board formed of fabric is used so that a feeling of an alien substance can be minimized. The fabric type semiconductor device package can be easily installed. The productivity of the fabric type semiconductor device package can be improved.

Abstract translation: 提供了一种织物类型的半导体器件封装。 该织物类型的半导体器件封装包括织物类型的印刷电路板，其包括织物和通过在织物上图形化导电材料形成的引线单元，半导体器件包括结合到织物型印刷电路板的引线单元的电极单元， 以及用于密封织物型印刷电路板和半导体器件的模制单元。 在根据本发明的织物类型的半导体器件封装中，使用由织物形成的织物型印刷电路板，以使外来物质的感觉最小化。 可以容易地安装织物类型的半导体器件封装。 可以提高织物型半导体器件封装的生产率。

公开(公告)号：US20090302457A1

公开(公告)日：2009-12-10

申请号：US12465703

申请日：2009-05-14

Applicant: Akihiro CHIDA ,  Tomoyuki AOKI

Inventor： Akihiro CHIDA ,  Tomoyuki AOKI

IPC: H01L23/12 ,  B32B5/02 ,  B05D5/12 ,  H01L21/58

CPC classification number: H05K3/4647 ,  H01L21/6835 ,  H01L23/3733 ,  H01L27/124 ,  H01L27/1266 ,  H01L29/78603 ,  H01L2221/6835 ,  H01L2224/29499 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/3025 ,  H05K1/0366 ,  H05K3/4069 ,  H05K2201/029 ,  H05K2203/1147 ,  Y10T442/2418 ,  H01L2924/00

Abstract: A wiring substrate is provided, including an insulating resin layer which is provided on both surfaces of a sheet-like fibrous body and with which the sheet-like fibrous body is impregnated, and a through wiring provided in a region surrounded by the insulating resin layer. The through wiring is formed using a conductive material, the conductive material is exposed on both surfaces of the insulating resin layer, the sheet-like fibrous body is positioned in the conductive material, and the sheet-like fibrous body is impregnated with the conductive material. A manufacturing method of the wiring substrate is also provided.

Abstract translation: 提供一种布线基板，包括设置在片状纤维体的两个表面上且被片状纤维体浸渍的绝缘树脂层，以及设置在由绝缘树脂层围绕的区域中的贯通布线 。 贯通布线使用导电材料形成，导电材料暴露在绝缘树脂层的两个表面上，片状纤维体位于导电材料中，并且片状纤维体浸渍有导电材料 。 还提供了布线基板的制造方法。

公开(公告)号：US07592276B2

公开(公告)日：2009-09-22

申请号：US10366441

申请日：2003-02-13

Applicant: Ian Gregory Hill ,  Seth Trotz ,  George Herbert Needham Riddle ,  Ponnusamy Palanisamy ,  Joseph M. Carpinelli ,  Dennis L. Matthies

Inventor： Ian Gregory Hill ,  Seth Trotz ,  George Herbert Needham Riddle ,  Ponnusamy Palanisamy ,  Joseph M. Carpinelli ,  Dennis L. Matthies

IPC: D03D15/00

CPC classification number: H05K3/10 ,  A41D1/005 ,  A41D13/1281 ,  A41D31/0011 ,  D02G3/441 ,  D03D1/0088 ,  D03D11/00 ,  D03D15/00 ,  D03D15/0066 ,  D03D15/0088 ,  D10B2101/20 ,  D10B2201/02 ,  D10B2201/04 ,  D10B2211/02 ,  D10B2211/04 ,  D10B2331/04 ,  D10B2401/16 ,  D10B2501/00 ,  D10B2501/04 ,  D10B2503/06 ,  D10B2503/10 ,  D10B2505/18 ,  D10B2507/06 ,  G06F3/14 ,  G06F3/147 ,  G09G2380/02 ,  H01R4/02 ,  H01R4/04 ,  H05K2201/0281 ,  H05K2201/029 ,  Y10S428/913 ,  Y10S428/917 ,  Y10T442/30 ,  Y10T442/3033 ,  Y10T442/3195 ,  Y10T442/322 ,  Y10T442/339 ,  Y10T442/3976

Abstract: A woven article comprises a plurality of electrically insulating and/or electrically conductive yarn in the warp and a plurality of electrically insulating and/or electrically conductive yarn in the weft interwoven with the yarn in the warp. A functional yarn in the warp and/or the weft comprises an elongate substrate including at least one electrical conductor and at least one electronic device thereon, wherein the at least one electrical conductor provides directly and/or indirectly an electrical contact for connecting to the electronic device.

Abstract translation: 编织物包括经纱中的多个电绝缘和/或导电纱线以及与经纱中的纱线交织的纬纱中的多个电绝缘和/或导电纱线。 经线和/或纬纱中的功能性纱线包括细长衬底，其包括至少一个电导体和其上的至少一个电子器件，其中所述至少一个电导体直接和/或间接地提供用于连接到电子 设备。

公开(公告)号：US20090188699A1

公开(公告)日：2009-07-30

申请号：US12118658

申请日：2008-05-09

Applicant: Yu-Hsu Lin ,  Jeng-Da Wu ,  Chih-Hang Chao

Inventor： Yu-Hsu Lin ,  Jeng-Da Wu ,  Chih-Hang Chao

IPC: H05K1/02

CPC classification number: H05K1/0366 ,  H05K1/0245 ,  H05K1/0248 ,  H05K2201/029 ,  H05K2201/09236 ,  H05K2201/09281

Abstract: A printed circuit board includes a base and a signal trace laid on the base. The signal trace includes a plurality of straight line segments parallel to the first fibers. The signal trace is laid on the base in such a manner that the line segments of the signal trace mapped on the base partly superpose the first fibers and partly superpose gaps between two adjacent first fibers.

Abstract translation: 印刷电路板包括放置在基座上的基座和信号迹线。 信号迹线包括平行于第一光纤的多条直线段。 信号迹线以这样的方式铺设在基座上，使得映射在基座上的信号迹线的线段部分地叠加第一光纤并且部分地叠加两个相邻的第一光纤之间的间隙。

公开(公告)号：US07501069B2

公开(公告)日：2009-03-10

申请号：US11421173

申请日：2006-05-31

Applicant: Chang Liu ,  Nannan Chen

Inventor： Chang Liu ,  Nannan Chen

IPC: B81B5/00 ,  B81C3/00 ,  B82B1/00 ,  B82B3/00

CPC classification number: H05K1/0289 ,  B81C99/008 ,  D03D1/0088 ,  D03D9/00 ,  D03D15/00 ,  D03D15/0066 ,  D10B2101/06 ,  D10B2101/08 ,  D10B2101/20 ,  D10B2401/16 ,  D10B2401/20 ,  D10B2403/02431 ,  H01L51/0021 ,  H01L51/0097 ,  H01L51/5203 ,  H05K1/038 ,  H05K3/007 ,  H05K3/202 ,  H05K3/467 ,  H05K2201/0281 ,  H05K2201/029 ,  H05K2203/0152 ,  H05K2203/0769 ,  H05K2203/308 ,  Y02E10/549 ,  Y02P70/521 ,  Y10S977/701 ,  Y10S977/724 ,  Y10S977/856 ,  Y10S977/857 ,  Y10T156/1052 ,  Y10T428/24802

Abstract: This invention provides free-standing structures, functionalized free-standing structures and functional devices that are flexible, including nano- and micromachined flexible fabrics comprising woven networks and mesh networks. The present invention provides processing methods for making and functionalizing flexible free-standing structures having a wide range of integrated materials, devices and device components. The methods of the present invention are capable of providing large area functional electronic, optoelectronic, fluidic, and electromechanical devices and device arrays which exhibit good device performance in stretched, bent and/or deformed configurations.

Abstract translation: 本发明提供了独立结构，功能化独立结构和功能性装置，其是柔性的，包括纳米和微加工的柔性织物，其包括编织网络和网状网络。 本发明提供了制造和功能化具有广泛的一体化材料，装置和装置部件的柔性独立结构的加工方法。 本发明的方法能够提供在拉伸，弯曲和/或变形构造中表现出良好装置性能的大面积功能的电子，光电子，流体和机电装置和装置阵列。

公开(公告)号：US20090052835A1

公开(公告)日：2009-02-26

申请号：US12193311

申请日：2008-08-18

Applicant: Toru Okazaki ,  Hideo Suzuki

Inventor： Toru Okazaki ,  Hideo Suzuki

IPC: G02B6/00

CPC classification number: H05K3/4688 ,  H05K1/0271 ,  H05K1/0366 ,  H05K2201/029 ,  Y10T29/49124 ,  Y10T29/49155

Abstract: The present invention provides a multilayer wiring board in which warpage during reflow soldering can be reduced even if there is no sufficient space for disposing a dummy pattern or if a dummy pattern cannot be disposed. A difference between the ratios of copper remaining in wiring layers causes a difference between the amounts of thermal expansion of the wiring layers. The fiber bundle content of at least one resin base material layer is made different from that of the other resin base material layers, to cause a difference between the amounts of thermal expansion of the resin base material layers. This difference between the amounts of thermal expansion of the resin base material layers is used to cancel the difference between the amounts of thermal expansion of the wiring layers. Thus, warpage of the board during reflow soldering is reduced.

Abstract translation: 本发明提供一种多层布线基板，其中即使没有足够的空间来设置虚设图案，或者如果不能设置虚设图案，则可以降低回流焊接期间的翘曲。 布线层中残留的铜的比例之间的差异导致布线层的热膨胀量之间的差异。 使至少一个树脂基材层的纤维束含量与其它树脂基材层的纤维束含量不同，导致树脂基材层的热膨胀量之间的差异。 使用树脂基材层的热膨胀量之间的这种差异来消除布线层的热膨胀量之差。 因此，在回流焊接期间板的翘曲减小。

公开(公告)号：US20080308306A1

公开(公告)日：2008-12-18

申请号：US12193298

申请日：2008-08-18

Applicant: Tao Liang ,  Stephen H. Hall ,  Howard Heck ,  Gary A. Brist ,  Bryce Horine

Inventor： Tao Liang ,  Stephen H. Hall ,  Howard Heck ,  Gary A. Brist ,  Bryce Horine

IPC: H05K1/03

CPC classification number: H05K1/0245 ,  H05K1/0366 ,  H05K2201/029 ,  H05K2201/09236

Abstract: An article of manufacture includes a circuit board and a pair of traces on or in the circuit board. The pair of traces includes a first trace and a second trace. The first trace includes a first segment and a second segment continuously joined to the first segment. The first segment coincides with a first longitudinal axis. The second trace includes a first segment that runs alongside the first segment of the first trace. The second trace also includes a second segment that runs alongside the second segment of the first trace. The second segment of the second trace is continuously joined to the first segment of the second trace. The second segment of the second trace coincides with the first longitudinal axis.

Abstract translation: 制造品包括电路板和电路板上或电路板中的一对迹线。 该对轨迹包括第一轨迹和第二轨迹。 第一迹线包括连续地连接到第一段的第一段和第二段。 第一段与第一纵向轴线重合。 第二个跟踪包括与第一个跟踪的第一个段一起运行的第一个段。 第二轨迹还包括与第一轨迹的第二段一起运行的第二段。 第二迹线的第二段连续地连接到第二迹线的第一段。 第二轨迹的第二段与第一纵向轴线重合。

公开(公告)号：US20080258314A1

公开(公告)日：2008-10-23

申请号：US12037203

申请日：2008-02-26

Applicant: Hoi-Jun Yoo ,  Yongsang KIM ,  Hyejung KIM

Inventor： Hoi-Jun Yoo ,  Yongsang KIM ,  Hyejung KIM

IPC: H01L23/49 ,  H01L21/56

CPC classification number: H01L23/3121 ,  H01L23/14 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/81801 ,  H01L2224/85 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/038 ,  H05K3/143 ,  H05K3/326 ,  H05K2201/029 ,  H05K2201/10287 ,  H05K2203/0221 ,  H01L2224/83851 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A fabric type semiconductor device package is provided. The fabric type semiconductor device package comprises a fabric type printed circuit board comprising a fabric and a lead unit formed by patterning a conductive material on the fabric, a semiconductor device comprising an electrode unit bonded to the lead unit of the fabric type printed circuit board, and a molding unit for sealing the fabric type printed circuit board and the semiconductor device. In the fabric type semiconductor device package according to the present invention, a fabric type printed circuit board formed of fabric is used so that a feeling of an alien substance can be minimized. The fabric type semiconductor device package can be easily installed. The productivity of the fabric type semiconductor device package can be improved.

Abstract translation: 提供了一种织物类型的半导体器件封装。 该织物类型的半导体器件封装包括织物类型的印刷电路板，其包括织物和通过在织物上图形化导电材料形成的引线单元，半导体器件包括结合到织物型印刷电路板的引线单元的电极单元， 以及用于密封织物型印刷电路板和半导体器件的模制单元。 在根据本发明的织物类型的半导体器件封装中，使用由织物形成的织物型印刷电路板，以使外来物质的感觉最小化。 可以容易地安装织物类型的半导体器件封装。 可以提高织物型半导体器件封装的生产率。

公开(公告)号：US20080083559A1

公开(公告)日：2008-04-10

申请号：US11905913

申请日：2007-10-05

Applicant: Hideki Kusamitsu

Inventor： Hideki Kusamitsu

IPC: H05K1/00

CPC classification number: H05K3/281 ,  H05K1/0218 ,  H05K1/024 ,  H05K1/0393 ,  H05K2201/0116 ,  H05K2201/029 ,  H05K2201/0715

Abstract: A flexible printed circuit board wherein the insulative substrate 34 having a plurality of conductive layers 36b covered with a protective layer 38 is encircled by a mesh-cloth member 32.

Abstract translation: 柔性印刷电路板，其中具有覆盖有保护层38的多个导电层36b的绝缘基板34被网状布构件32包围。

公开(公告)号：US20080083481A1

公开(公告)日：2008-04-10

申请号：US11875010

申请日：2007-10-19

Applicant: Sundaresan Jayaraman ,  Sungmee Park

Inventor： Sundaresan Jayaraman ,  Sungmee Park

IPC: B29C65/00 ,  B32B37/00 ,  B65H69/00

CPC classification number: H01R43/0207 ,  H01H2203/0085 ,  H05K1/0289 ,  H05K3/10 ,  H05K3/328 ,  H05K3/4069 ,  H05K3/4084 ,  H05K2201/0281 ,  H05K2201/029 ,  H05K2203/0126 ,  H05K2203/0783 ,  Y10S2/905 ,  Y10T156/10 ,  Y10T442/3228

Abstract: Disclosed are systems or apparatuses and methods for forming a junction between conductive fibers that are incorporated into a fabric. Briefly, one method includes the steps of removing insulation from two intersecting individually insulated conductive fibers to expose the individually conductive fibers, bringing the exposed individually conductive fibers into contact with each other at a junction point, and forming a molecular bond between the conductive fibers at the junction point. Also disclosed are systems for forming a junction between conductive fibers that are incorporated into a fabric. In this regard, one embodiment of such a system can include a first apparatus that removes insulation from two intersecting individually insulated conductive fibers to expose the individually conductive fibers, a second apparatus that brings the exposed individually conductive fibers into contact with each other at a junction point, and a third apparatus that aids in formation of a molecular bond between the conductive fibers at the junction point.

Abstract translation: 公开了用于形成结合到织物中的导电纤维之间的接合部的系统或装置和方法。 简而言之，一种方法包括以下步骤：从两个相交的单独绝缘的导电纤维去除绝缘体以暴露单独的导电纤维，使暴露的单独的导电纤维在接合点处彼此接触，并且在导电纤维之间形成分子键 交点。 还公开了用于形成结合到织物中的导电纤维之间的接合部的系统。 在这方面，这种系统的一个实施例可以包括第一装置，其从两个相交的单独绝缘的导电纤维去除绝缘以暴露单独的导电纤维;第二装置，其使暴露的单独的导电纤维在接合处彼此接触 点和第三装置，其有助于在接合点处在导电纤维之间形成分子键。