公开(公告)号：US07291915B2

公开(公告)日：2007-11-06

申请号：US11203124

申请日：2005-08-15

Applicant: Toshio Sugawa ,  Hideki Higashitani ,  Takumi Misaki

Inventor： Toshio Sugawa ,  Hideki Higashitani ,  Takumi Misaki

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H05K1/0242 ,  H05K1/0237 ,  H05K3/108 ,  H05K3/181 ,  H05K3/24 ,  H05K3/381 ,  H05K3/383 ,  H05K3/384 ,  H05K3/4069 ,  H05K2201/0338 ,  H05K2201/0355 ,  H05K2201/098 ,  H05K2203/0307 ,  H05K2203/0392 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49133

Abstract: A circuit board includes an insulating substrate, a first conductive layer on the insulating substrate, a second conductive layer on the first conductive layer, and a third conductive layer covering the first conductive layer and the second conductive layer. The first conductive layer has a surface provided on the surface of the insulating substrate, and a surface having a width smaller than a width of the above surface. In this circuit board, the conductive layers have small impedances even if a high-frequency signal flows in the conductive layers.

Abstract translation: 电路板包括绝缘基板，绝缘基板上的第一导电层，第一导电层上的第二导电层和覆盖第一导电层和第二导电层的第三导电层。 第一导电层具有设置在绝缘基板的表面上的表面和宽度小于上述表面的宽度的表面。 在该电路板中，即使高频信号在导电层中流动，导电层也具有小的阻抗。

公开(公告)号：US20070145584A1

公开(公告)日：2007-06-28

申请号：US10583846

申请日：2004-12-10

Applicant: Tatsuo Kataoka ,  Yoshikazu Akashi ,  Yutaka Iguchi

Inventor： Tatsuo Kataoka ,  Yoshikazu Akashi ,  Yutaka Iguchi

IPC: H01L23/48

CPC classification number: C25D5/02 ,  C25D7/00 ,  H01L2924/0002 ,  H05K3/06 ,  H05K3/067 ,  H05K3/22 ,  H05K3/388 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2203/0346 ,  H05K2203/1476 ,  H01L2924/00

Abstract: The printed wiring board comprises, on at least one surface of an insulating film, a base metal layer and a conductive metal layer formed on the base metal layer, and is characterized in that in a section of the wiring board the bottom width of the conductive metal layer is smaller than the top width of the base metal layer. The circuit device comprises the printed wiring board and an electronic part mounted thereon. The process for producing a printed wiring board comprises bringing a base metal layer and a conductive metal layer into contact with an etching solution capable of dissolving the conductive metal to form a wiring pattern and then sequentially bringing the resultant into contact with a first treating solution capable of dissolving the metal for forming the base metal layer, a microetching solution capable of selectively dissolving the conductive metal and a second treating solution having a different chemical composition from the first treating solution in this order.

Abstract translation: 印刷布线板在绝缘膜的至少一个表面上包括形成在基底金属层上的基底金属层和导电金属层，其特征在于，在布线板的一部分中，导电的底部宽度 金属层比基体金属层的顶部宽度小。 电路装置包括印刷线路板和安装在其上的电子部件。 制造印刷电路板的方法包括使基底金属层和导电金属层与能够溶解导电金属的蚀刻溶液接触以形成布线图案，然后顺序地使得到的第一处理溶液与第一处理溶液接触 溶解用于形成基底金属层的金属，能够依次从第一处理溶液中选择性地溶解导电金属的微蚀刻溶液和具有不同化学组成的第二处理溶液。

公开(公告)号：US20070045801A1

公开(公告)日：2007-03-01

申请号：US11514736

申请日：2006-08-31

Applicant: Tomohei Sugiyama ,  Kyoichi Kinoshita ,  Katsufumi Tanaka ,  Eiji Kono

Inventor： Tomohei Sugiyama ,  Kyoichi Kinoshita ,  Katsufumi Tanaka ,  Eiji Kono

IPC: H01L23/06

CPC classification number: H05K1/0271 ,  H01L2224/32225 ,  H05K1/0272 ,  H05K1/056 ,  H05K1/09 ,  H05K2201/0209 ,  H05K2201/0338 ,  H05K2201/068

Abstract: A circuit board includes a substrate having a heat exhausting function. A wiring layer of a metal composite material is provided on the substrate with an insulating layer in between. The metal composite material has a coefficient of thermal expansion that is greater than a coefficient of thermal expansion of a silicon semiconductor chip and less than a coefficient of thermal expansion of copper. Accordingly, a circuit board that is suitable for mounting power devices, requires no heat sink or heat spreader is provides. Further, the number of components for assembling a module is reduced.

Abstract translation: 电路板包括具有排热功能的基板。 在基板上设置金属复合材料的布线层，其间具有绝缘层。 金属复合材料的热膨胀系数大于硅半导体芯片的热膨胀系数，小于铜的热膨胀系数。 因此，适用于安装功率器件的电路板不需要散热器或散热器。 此外，用于组装模块的部件的数量减少。

公开(公告)号：US20060240231A1

公开(公告)日：2006-10-26

申请号：US11111317

申请日：2005-04-21

Applicant: Bradley Carter ,  Lynda Flederbach ,  John Isenberg

Inventor： Bradley Carter ,  Lynda Flederbach ,  John Isenberg

IPC: B32B3/00 ,  B32B18/00

CPC classification number: H05K1/092 ,  C04B37/025 ,  C04B2237/062 ,  H05K3/248 ,  H05K2201/0338 ,  H05K2201/035 ,  Y10T428/24917 ,  Y10T428/24926

Abstract: An improved electrical printed circuit exhibiting a combination of enhanced solderability and outstanding adhesion with a dielectric substrate includes a stack of two different types of conductive films. The stack includes a first conductive film that is printed onto the substrate with an ink that has been specially formulated to achieve enhanced adhesion with the substrate, and a second film that is applied over the first film using an ink that has been specifically formulated to achieve enhanced solderability.

Abstract translation: 表现出增强的可焊性和与介电基片的突出粘附性的组合的改进的电印刷电路包括两种不同类型的导电膜的叠层。 该堆叠包括第一导电膜，其被印刷在具有专门配制以实现与基板的增强的粘附性的油墨的基底上;以及第二膜，其使用特别配制成实现的油墨施加在第一膜上 增强的可焊性。

公开(公告)号：US20060222821A1

公开(公告)日：2006-10-05

申请号：US11390311

申请日：2006-03-28

Applicant: Taku Masai

Inventor： Taku Masai

IPC: B32B1/00 ,  B32B15/00

CPC classification number: H05K1/0271 ,  H01F17/0006 ,  H01F2017/0046 ,  H01F2017/0066 ,  H05K1/09 ,  H05K2201/0317 ,  H05K2201/0338 ,  Y10T428/24628 ,  Y10T428/31678 ,  Y10T428/32

Abstract: A composite substrate capable of suppressing a deformation of the substrate in response to the influence of internal stress of a conductive film is provided. When a conductive film is formed on a substrate, the conductive film is formed so as to have a laminated structure including a main conductive film which has a tensile stress FT as its internal stress F1 and a sub-conductive film which has a compressive stress FC as its internal stress F2. In this manner, the tensile stress FT of the main conductive film is offset by use of the compressive stress FC of the sub-conductive film. Thereby, unlike the case where the conductive film is formed so that only the main conductive film may be included without including the sub-conductive film, the substrate becomes less deformable in response to the influence of the internal stress F of the conductive film.

Abstract translation: 提供了能够响应于导电膜的内部应力的影响而抑制基板的变形的复合基板。 当在基板上形成导电膜时，导电膜形成为具有包括具有作为其内应力F 1的拉伸应力FT的主导电膜和具有压应力的副导电膜的层叠结构 FC作为其内应力F 2。 以这种方式，通过使用副导电膜的压缩应力FC来抵消主导电膜的拉伸应力FT。 因此，与形成导电膜的情况不同，只要不包括副导电膜即可包含主导电膜，则基板导电膜的内应力F的影响会变小。

公开(公告)号：US20050272252A1

公开(公告)日：2005-12-08

申请号：US11139036

申请日：2005-05-27

Applicant: Ryosuke Usui ,  Hideki Mizuhara ,  Yasunori Inoue ,  Yusuke Igarashi ,  Takeshi Nakamura

Inventor： Ryosuke Usui ,  Hideki Mizuhara ,  Yasunori Inoue ,  Yusuke Igarashi ,  Takeshi Nakamura

IPC: H01L21/4763 ,  H01L23/14 ,  H01L23/31 ,  H01L23/36 ,  H01L23/498 ,  H01L25/16 ,  H05K1/02 ,  H05K1/05 ,  H05K3/28 ,  H05K3/38 ,  H05K3/46

CPC classification number: H05K1/0206 ,  H01L23/142 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/49811 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/05 ,  H05K1/056 ,  H05K3/284 ,  H05K3/382 ,  H05K3/4644 ,  H05K2201/0209 ,  H05K2201/0338 ,  H05K2201/068 ,  H05K2201/096 ,  H05K2203/0315 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015

Abstract: Provided is a circuit device capable of inhibiting an insulating layer from separating from a substrate. This circuit device comprises a substrate mainly constituted of metal including a first metal layer having a first thermal expansion coefficient, a second metal layer, formed on the first metal layer, having a second thermal expansion coefficient different from the first thermal expansion coefficient of the first metal layer and a third metal layer, formed on the second metal layer, having a third thermal expansion coefficient different from the second thermal expansion coefficient of the second metal layer, an insulating layer formed on the substrate, a conductive layer formed on the insulating layer and a circuit element electrically connected to the conductive layer.

Abstract translation: 提供了能够抑制绝缘层与基板分离的电路装置。 该电路装置包括主要由金属构成的基板，该基板包括形成在第一金属层上的具有第一热膨胀系数的第一金属层，第二金属层，具有与第一热膨胀系数不同的第二热膨胀系数的第二热膨胀系数 金属层和第三金属层，形成在第二金属层上，具有与第二金属层的第二热膨胀系数不同的第三热膨胀系数，形成在基板上的绝缘层，形成在绝缘层上的导电层 以及与导电层电连接的电路元件。

公开(公告)号：US06811815B2

公开(公告)日：2004-11-02

申请号：US10172282

申请日：2002-06-14

Applicant: Xiao-Ming He ,  Ramin Heydarpour

Inventor： Xiao-Ming He ,  Ramin Heydarpour

IPC: C23C1600

CPC classification number: C23C14/562 ,  B29D11/0073 ,  C23C14/022 ,  C23C14/08 ,  C23C14/205 ,  G02F1/133305 ,  G02F1/13439 ,  H01B1/02 ,  H01B1/08 ,  H05K1/0393 ,  H05K3/381 ,  H05K2201/0338 ,  H05K2203/095 ,  H05K2203/1545 ,  Y10T428/31504

Abstract: Methods for roll-to-roll deposition of optically transparent and high conductivity metallic thin films are disclosed. In general, a method according to the present invention comprises: (1) providing a flexible plastic substrate; (2) depositing a multi-layered conductive metallic film on the flexible plastic substrate by a thin-film deposition technique to form a composite film; and (3) collecting the composite film in continuous rolls. Typically, the thin conductive metallic film is an InCeO—Ag—InCeO film. Typically, the thin-film deposition technique is DC magnetron sputtering. Another aspect of the invention is a composite film produced by a method according to the present invention. Still another aspect of the invention is a composite film comprising InCeO—Ag—InCeO film formed on a flexible plastic substrate, wherein the composite film has a combination of properties including: transmittance of at least 90% throughout the visible region; an electrical resistance of no greater than about 10 &OHgr;/square; a root-mean-square roughness of no greater than about 2.5 nm; and an interlayer adhesion between the InCeO/Ag/InCeO metallic film and the remainder of the composite film that is sufficiently great to survive a 180° peel adhesion test.

Abstract translation: 公开了光学透明和高导电性金属薄膜的卷对卷沉积的方法。 通常，根据本发明的方法包括：（1）提供柔性塑料基板; （2）通过薄膜沉积技术在柔性塑料基板上沉积多层导电金属膜以形成复合膜; 和（3）将复合膜收集在连续辊中。 通常，薄导电金属膜是InCeO-Ag-InCeO膜。 通常，薄膜沉积技术是直流磁控溅射。 本发明的另一方面是通过根据本发明的方法制造的复合膜。 本发明的另一方面是一种复合膜，其包括在柔性塑料基材上形成的InCeO-Ag-InCeO膜，其中该复合膜具有以下特性的组合，包括：透过整个可见区域的至少90％ 电阻不大于约10Ω/平方; 均方根粗糙度不大于约2.5nm; 以及InCeO / Ag / InCeO金属膜与复合膜的其余部分之间的层间粘合，其足够大以承受180°剥离粘合试验。

公开(公告)号：US06802729B2

公开(公告)日：2004-10-12

申请号：US09924641

申请日：2001-08-08

Applicant: Henry Otto Hermann, Jr. ,  Marjorie Kay Myers

Inventor： Henry Otto Hermann, Jr. ,  Marjorie Kay Myers

IPC: H01R1353

CPC classification number: H05K1/117 ,  H01R13/03 ,  H01R13/6666 ,  H01R24/60 ,  H01R2107/00 ,  H01R2201/20 ,  H05K1/167 ,  H05K2201/0338 ,  Y10S439/931 ,  Y10S439/951

Abstract: A signal connector assembly with a plug contact within a plug having a high resistive portion. When the plug of the assembly first makes contact with the electrical receptacles within a mating receptacle, the high resistive portion prevents a current surge. As the plug is further inserted into the receptacle, the energy passing from the plug to the receptacle is gradually increased. Eventually, the receptacle contacts within the receptacle pass the high resistive portion and make contact with the conductive portion of the plug contact, thereby permitting transmission of valid signals without the generation of spurious errors.

Abstract translation: 一种信号连接器组件，其具有在具有高电阻部分的插头内的插头接触。 当组件的插头首先与配合插座内的电插座接触时，高电阻部分防止电流浪涌。 当插头进一步插入插座时，从插头到插座的能量逐渐增加。 最终，插座内的插座触点通过高电阻部分并与插头触点的导电部分接触，从而允许传输有效信号，而不会产生杂散误差。

公开(公告)号：US20040041243A1

公开(公告)日：2004-03-04

申请号：US10432005

申请日：2003-09-22

Inventor： Tsuyoshi Ogawa

IPC: H01L023/495

CPC classification number: H01L23/49894 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/498 ,  H01L23/49822 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/16 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12042 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H05K1/16 ,  H05K1/162 ,  H05K1/167 ,  H05K3/062 ,  H05K3/067 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0317 ,  H05K2201/0338 ,  H05K2201/09509 ,  H05K2203/0315 ,  H05K2203/0361 ,  H05K2203/1453 ,  Y10S438/957 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention relates to a thin film circuit board device having passive elements in wiring layers. The thin film circuit board device includes a base board (2) and a circuit part (3) including insulating layers (11) and (16) and pattern wiring (14) and (17) formed on a build-up forming surface (2a). On the first insulating layer (11), a receiving electrode part (21) is formed and the passive elements electrically connected to the receiving electrode part (21) are formed. In the circuit part (3), a substrate titanium film and a substrate film are laminated so as to cover the receiving electrode part (21) and the passive elements respectively. The substrate film and the substrate titanium film in areas in which a metallic film is not formed are etched through the metallic film serving as the first pattern wiring (14) formed on the substrate film as a mask. Thus, a substrate layer (23) and a substrate titanium layer (22) are formed. Consequently, the substrate titanium film serving as the substrate titanium layer (22) prevents the corrosion of the receiving electrode part and the respective passive elements due to etching liquid to form the passive elements with high performance.

Abstract translation: 本发明涉及一种在布线层中具有无源元件的薄膜电路板器件。 薄膜电路板装置包括基板（2）和包括绝缘层（11）和（16）的电路部分（3）和形成在堆积形成表面（2a）上的图案布线（14）和（17） ）。 在第一绝缘层（11）上，形成接收电极部（21），并且形成与接收电极部（21）电连接的无源元件。 在电路部分（3）中，层叠基板钛膜和基板膜以覆盖接收电极部分（21）和无源元件。 通过作为形成在基板膜上的第一图案布线（14）的金属膜作为掩模，蚀刻在未形成金属膜的区域中的基板膜和基板钛膜。 因此，形成基板层（23）和基板钛层（22）。 因此，用作基板钛层（22）的基板钛膜防止由于蚀刻液体而导致的接收电极部分和各个无源元件的腐蚀，从而形成具有高性能的无源元件。

公开(公告)号：US20030207627A1

公开(公告)日：2003-11-06

申请号：US09924641

申请日：2001-08-08

Inventor： Henry Otto Hermann JR. ,  Marjorie Kay Myers

IPC: H01R009/24

CPC classification number: H05K1/117 ,  H01R13/03 ,  H01R13/6666 ,  H01R24/60 ,  H01R2107/00 ,  H01R2201/20 ,  H05K1/167 ,  H05K2201/0338 ,  Y10S439/931 ,  Y10S439/951

Abstract: A signal connector assembly with a plug contact within a plug having a high resistive portion. When the plug of the assembly first makes contact with the electrical receptacles within a mating receptacle, the high resistive portion prevents a voltage surge. As the plug is further inserted into the receptacle, the energy passing from the plug to the receptacle is gradually increased. Eventually, the receptacle contacts within the receptacle pass the high resistive portion and make contact with the conductive portion of the plug contact, thereby permitting transmission of valid signals without the generation of spurious errors.

Abstract translation: 一种信号连接器组件，其具有在具有高电阻部分的插头内的插头接触。 当组件的插头首先与配合插座内的电插座接触时，高电阻部分防止电压浪涌。 当插头进一步插入插座时，从插头到插座的能量逐渐增加。 最终，插座内的插座触点通过高电阻部分并与插头触点的导电部分接触，从而允许传输有效信号，而不会产生杂散误差。