公开(公告)号：US11889634B2

公开(公告)日：2024-01-30

申请号：US17135223

申请日：2020-12-28

Applicant: LG INNOTEK CO., LTD.

Inventor： Jung Ho Hwang ,  Han Su Lee ,  Dae Young Choi ,  Soon Gyu Kwon ,  Dong Hun Jeong ,  In Ho Jeong ,  Kil Dong Son ,  Sang Hwa Kim ,  Sang Young Lee ,  Jae Hoon Jeon ,  Jin Hak Lee ,  Yun Mi Bae

IPC: H05K1/11 ,  H05K3/18 ,  H05K1/02 ,  H05K1/09 ,  H05K3/10 ,  H05K3/46 ,  H05K3/00 ,  H05K3/24 ,  H01L23/00

CPC classification number: H05K3/188 ,  H05K1/0298 ,  H05K1/09 ,  H05K3/002 ,  H05K3/108 ,  H05K3/184 ,  H05K3/467 ,  H05K3/4661 ,  H01L24/11 ,  H01L24/12 ,  H05K1/111 ,  H05K3/244 ,  H05K2201/0347 ,  H05K2201/098 ,  H05K2203/0548 ,  H05K2203/0588 ,  H05K2203/0723 ,  H05K2203/1184 ,  Y10T29/49147

Abstract: A method of manufacturing a printed circuit board includes providing an insulating layer, forming a plating seed layer on the insulating layer, forming a first circuit pattern on the plating seed layer and a second circuit pattern on the first circuit pattern, and forming a top metal layer on the second circuit pattern. The second circuit pattern can be thinner than the first circuit pattern, and the top metal layer can be wider than the second circuit pattern.

公开(公告)号：US20180110121A1

公开(公告)日：2018-04-19

申请号：US15723375

申请日：2017-10-03

Applicant: IRISO ELECTRONICS CO., LTD.

Inventor： Yujiro Sugaya ,  Yuki Asanuma

IPC: H05K1/09 ,  H05K1/11 ,  H05K1/14 ,  H05K3/40 ,  H05K3/36

CPC classification number: H05K1/09 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49866 ,  H05K1/112 ,  H05K1/144 ,  H05K3/366 ,  H05K3/4038 ,  H05K2201/0338 ,  H05K2201/041 ,  H05K2201/09727 ,  H05K2201/098 ,  H05K2201/09827 ,  H05K2201/10265

Abstract: To provide a circuit board that is capable of establishing electrical connection, that is thinner, and that has a higher maintainability. A circuit board 100 includes a substrate 101 including a hole portion 110 that penetrates the substrate 101 in a plate thickness direction, and a connector region including a first conductor layer 202 that closes one side of the hole portion 110, liquid metal 210 disposed in a recess 201 formed by the hole portion 110 and the first conductor layer 202, and a sealing layer 212 that is the liquid metal 210 cured on a liquid surface side. The liquid metal 210 may be in contact with a second conductor layer 204 formed in the recess 201.

公开(公告)号：US20170367185A1

公开(公告)日：2017-12-21

申请号：US15188681

申请日：2016-06-21

Applicant: General Electric Company

Inventor： Robert Joseph Roessler

IPC: H05K1/18 ,  H05K3/00 ,  H05K1/02 ,  H05K3/30 ,  H05K3/42 ,  H05K1/11

CPC classification number: H05K1/181 ,  H05K1/0265 ,  H05K1/0298 ,  H05K1/113 ,  H05K1/115 ,  H05K3/0047 ,  H05K3/303 ,  H05K3/424 ,  H05K3/429 ,  H05K2201/098 ,  H05K2201/1003 ,  H05K2201/10166 ,  H05K2203/1476 ,  Y10T29/49165

Abstract: A method of manufacturing a printed circuit board includes providing a printed circuit board (PCB) substrate including at least one insulating layer and first and second conductive layers separated from one another by the at least one insulating layer, forming a first via hole in the PCB substrate extending from the first conductive layer to the second conductive layer, where the first via hole is defined by a first sidewall of the PCB substrate, forming a second via hole in the PCB substrate, where the second via hole is defined by a second sidewall of the PCB substrate, and selectively plating the first sidewall and the second sidewall to form a first via and a second via, respectively, where the first via and the second via have different via sidewall thicknesses.

公开(公告)号：US09820378B2

公开(公告)日：2017-11-14

申请号：US15241714

申请日：2016-08-19

Applicant: LG INNOTEK CO., LTD.

Inventor： Jung Ho Hwang ,  Han Su Lee ,  Dae Young Choi ,  Soon Gyu Kwon ,  Dong Hun Jeong ,  In Ho Jeong ,  Kil Dong Son ,  Sang Hwa Kim ,  Sang Young Lee ,  Jae Hoon Jeon ,  Jin Hak Lee ,  Yun Mi Bae

IPC: H05K1/09 ,  H05K1/02 ,  H05K3/10 ,  H05K3/24

CPC classification number: H05K3/188 ,  H05K1/0298 ,  H05K1/09 ,  H05K3/002 ,  H05K3/108 ,  H05K3/244 ,  H05K2201/0347 ,  H05K2201/098 ,  H05K2203/0548 ,  H05K2203/0588 ,  H05K2203/0723 ,  H05K2203/1184

Abstract: Disclosed are a printed circuit board and a method of manufacturing the printed circuit board. The printed circuit board includes an insulating layer, and a circuit pattern formed on the insulating layer, wherein the circuit pattern includes a first circuit pattern formed on the insulating layer and including a corner portion of an upper portion which has a predetermined curvature and a second circuit pattern formed on the first circuit pattern and configured to cover an upper surface of the first circuit pattern including the corner portion.

公开(公告)号：US09698094B2

公开(公告)日：2017-07-04

申请号：US15228059

申请日：2016-08-04

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Hiroharu Yanagisawa ,  Kazuhiro Kobayashi

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H05K1/02 ,  H01L21/48 ,  H01L23/00 ,  H05K1/11 ,  H05K1/18

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3178 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81395 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/83005 ,  H01L2224/83385 ,  H01L2224/92125 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/1816 ,  H05K1/0213 ,  H05K1/111 ,  H05K1/181 ,  H05K3/205 ,  H05K2201/0769 ,  H05K2201/09472 ,  H05K2201/09772 ,  H05K2201/098 ,  H05K2201/10674 ,  H05K2201/2072 ,  H05K2203/0278 ,  H05K2203/1105 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A wiring board includes: an insulating layer; and a wiring layer including: an upper surface; a lower surface opposite to the upper surface; and a side surface between the upper surface and the lower surface, wherein the upper surface of the wiring layer is exposed from the insulating layer, and the side surface and the lower surface of the wiring layer are embedded in the insulating layer. A recess portion is formed in an outer edge portion of the upper surface of the wiring layer, and the recess portion is filled with the insulating layer.

公开(公告)号：US09620278B2

公开(公告)日：2017-04-11

申请号：US14184632

申请日：2014-02-19

Applicant: General Electric Company

Inventor： Alan Carroll Lovell ,  Mark Eugene Shepard ,  Andrew David McArthur ,  Qin Chen ,  Todd David Greenleaf

IPC: H01F27/36 ,  H01F27/32 ,  H01F5/00 ,  H01F27/28 ,  H01F41/32

CPC classification number: H01F27/2804 ,  H01F17/0013 ,  H01F27/24 ,  H01F27/2885 ,  H01F41/0206 ,  H01F41/043 ,  H01F41/32 ,  H01F2017/008 ,  H01F2027/2809 ,  H01F2027/2819 ,  H05K1/0224 ,  H05K1/0254 ,  H05K1/0256 ,  H05K1/144 ,  H05K1/165 ,  H05K3/46 ,  H05K2201/0715 ,  H05K2201/09672 ,  H05K2201/098 ,  Y10T29/4902 ,  Y10T29/49073

Abstract: A device includes a printed circuit board (PCB). The device may also include a high voltage coil disposed on the PCB and a low voltage coil disposed on the PCB. Further, a conductive shield forms a three-dimensional enclosure around the high voltage coil and confines an electric field generated by the device to the PCB.

公开(公告)号：US20170094795A1

公开(公告)日：2017-03-30

申请号：US15310991

申请日：2015-05-13

Applicant: AT & S Austria Technologie & Systemtechink Aktiengesellschaft

Inventor： Johannes Stahr ,  Wolgang Schrittwieser ,  Mike Morianz ,  Christian Vockenberger ,  Markus Leitgeb

IPC: H05K1/18 ,  H05K1/09 ,  H05K3/40 ,  H05K3/10 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/18 ,  H05K1/025 ,  H05K1/0251 ,  H05K1/0306 ,  H05K1/0366 ,  H05K1/09 ,  H05K1/115 ,  H05K1/185 ,  H05K3/10 ,  H05K3/1258 ,  H05K3/40 ,  H05K3/4053 ,  H05K2201/09218 ,  H05K2201/098 ,  H05K2201/09854

Abstract: The invention relates to an electronic device having an electrically isolating support structure, an electrically conducting conductor path on a surface of the support structure, and an electrically conducting contact structure which extends from the surface into the support structure and is electrically connected to the conductor path at a connection point, thereby forming a common conductor track. The conductor path and the contact structure transition into each other in an enlargement-free manner at the connection point.

公开(公告)号：US20170019992A1

公开(公告)日：2017-01-19

申请号：US14831674

申请日：2015-08-20

Applicant: LG INNOTEK CO., LTD.

Inventor： Yun Mi BAE ,  Soon Gyu KWON ,  Sang Hwa KIM ,  Sang Young LEE ,  Jin Hak LEE ,  Han Su LEE ,  Dong Hun JEONG ,  In Ho JEONG ,  Dae Young CHOI ,  Jung Ho HWANG

IPC: H05K1/11 ,  C25D5/48 ,  C25D7/12 ,  C25D5/02 ,  H05K1/09 ,  C25D3/48

CPC classification number: H05K1/11 ,  C25D3/38 ,  C25D3/48 ,  C25D5/022 ,  C25D5/48 ,  C25D7/123 ,  H05K1/09 ,  H05K3/108 ,  H05K3/181 ,  H05K3/188 ,  H05K3/244 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2203/1184

Abstract: A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.

Abstract translation: 印刷电路板包括绝缘层，绝缘层上的电路图案和电路图案上的表面处理层。 表面处理层包括具有比电路图案的顶表面的宽度宽的宽度的底表面。

公开(公告)号：US20160381793A1

公开(公告)日：2016-12-29

申请号：US15189255

申请日：2016-06-22

Applicant: KYOCERA Corporation

Inventor： Masaharu YASUDA ,  Yoshihiro HASEGAWA

IPC: H05K1/02 ,  H05K3/46 ,  H05K1/11 ,  H05K3/10

CPC classification number: H05K3/4682 ,  H05K3/0097 ,  H05K2201/0376 ,  H05K2201/098 ,  H05K2201/2072 ,  H05K2203/1536

Abstract: A wiring board of the present disclosure includes an insulating layer and a wiring conductor. The wiring conductor is buried in an insulating layer in such a manner as to have a top surface exposed to a surface of the insulating layer. The wiring conductor includes, at a portion buried in the insulating layer, a wiring level difference part or a wiring inclined part having a width larger than a width of the top surface.

Abstract translation: 本公开的布线板包括绝缘层和布线导体。 布线导体以使顶表面暴露于绝缘层的表面的方式埋在绝缘层中。 布线导体包括在绝缘层中埋设的部分的布线级差部分或具有比顶表面的宽度大的宽度的布线倾斜部分。

公开(公告)号：US20160330835A1

公开(公告)日：2016-11-10

申请号：US15110977

申请日：2015-01-23

Applicant: TOPPAN FORMS CO., LTD.

Inventor： Kumi Hirose ,  Takuya Sekiguchi ,  Nariaki Nawa

IPC: H05K1/09 ,  H05K3/12 ,  G06F3/041 ,  H05K1/02

CPC classification number: H05K1/092 ,  G06F3/041 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04112 ,  H05K1/0225 ,  H05K1/0274 ,  H05K3/1275 ,  H05K2201/032 ,  H05K2201/09681 ,  H05K2201/098

Abstract: A wiring board includes: thin silver wires formed on a substrate by a printing method, in which the thin silver wires are configured so that the width thereof in a cross-section in a direction perpendicular to a wire length direction thereof is 20 μm or less, a top thereof has a smaller width than that of a contact portion that comes into contact with the substrate, and a volume resistivity of the thin silver wire is 15 μΩ·cm or less.

Abstract translation: 布线板包括：通过印刷方法形成在基板上的细银线，其中细银线被构造成使得其在与其线长度方向垂直的方向上的横截面中的宽度为20μm或更小 ，其顶部的宽度小于与基板接触的接触部分的宽度，并且细银线的体积电阻率为15μΩ·cm以下。