公开(公告)号：US08124223B2

公开(公告)日：2012-02-28

申请号：US12848408

申请日：2010-08-02

Applicant: Kuppusamy Kanakarajan ,  Arnold Frances

Inventor： Kuppusamy Kanakarajan ,  Arnold Frances

IPC: C08G73/10 ,  B32B27/06

CPC classification number: C09J179/08 ,  C08L77/10 ,  C08L2205/16 ,  C08L2666/20 ,  H05K1/0373 ,  H05K3/281 ,  H05K3/386 ,  H05K2201/0154 ,  H05K2201/0251 ,  H05K2201/0278 ,  H05K2201/068 ,  Y10T428/1023 ,  Y10T428/24917 ,  Y10T428/28 ,  Y10T428/2804 ,  Y10T428/31678 ,  Y10T428/31681 ,  Y10T428/31721 ,  Y10T442/2361

Abstract: The invention is directed to polyimide based adhesives having a coefficient of thermal expansion (“CTE”) equal to or below 50 ppm/° C. The adhesives of the present invention contain a polyimide base polymer present in the overall adhesive in an amount from 25 to 95 weight percent. The polyimide base polymer has a glass transition temperature (“Tg”) in a range of from about 150 to about 300° C. and typically has a coefficient of thermal expansion above 50 ppm/° C. The polyimide based adhesives of the invention also contain an aramid micro fiber filler in an amount from 5 to 75 weight percent, based upon the total weight of the polyimide based adhesive. The fiber filler can be used to lower CTE of the overall adhesive to match (or nearly match) the CTE of other materials like metal, silicon wafers, other polymers (including polyimide) and the like.

Abstract translation: 本发明涉及具有等于或低于50ppm /℃的热膨胀系数（“CTE”）的聚酰亚胺基粘合剂。本发明的粘合剂含有总体粘合剂中聚酰亚胺基聚合物的量为25 至95重量％。 聚酰亚胺基聚合物的玻璃化转变温度（“Tg”）在约150至约300℃的范围内，并且通常具有高于50ppm /℃的热膨胀系数。本发明的聚酰亚胺基粘合剂也 基于聚酰亚胺基粘合剂的总重量，含有5至75重量％的芳族聚酰胺微纤维填料。 纤维填料可用于降低整个粘合剂的CTE以匹配（或几乎匹配）其它材料如金属，硅晶片，其它聚合物（包括聚酰亚胺）等的CTE。

公开(公告)号：US08089775B2

公开(公告)日：2012-01-03

申请号：US12318475

申请日：2008-12-30

Applicant: Shinji Matsuda

Inventor： Shinji Matsuda

IPC: H05K7/10 ,  H05K7/12

CPC classification number: H01L23/49833 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/00014 ,  H05K1/0203 ,  H05K1/0271 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/0116 ,  H05K2201/0195 ,  H05K2201/049 ,  H05K2201/068 ,  H05K2201/09063 ,  H05K2201/09781 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2201/2036 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2224/29099 ,  H01L2224/0401

Abstract: Conductive or solder bumps are stacked between a mounted component such as a BGA device and a printed wiring substrate in a multileveled printed circuit board unit. An interposer or relay substrate is interposed between the adjacent stacked conductive bumps. The interposer substrate is made of a porous material. When any difference in the expansion is caused between the printed wiring substrate and the mounted component, one side of the interposer substrate receives a relatively smaller displacement force while the other side of the interposer substrate receives a relatively larger displacement force. A shearing stress is induced in the interposer substrate. Deformation of the porous material serves to absorb the shearing stress in the interposer substrate. The conductive bumps bonded on one side of the interposer substrate as well as the conductive bumps bonded on the other side of the interposer substrate may be relieved from a shearing stress. Accordingly, the durability of the conductive bumps can be improved. The conductive bumps are allowed to keep a stronger bonding in a longer duration.

Abstract translation: 在多层印刷电路板单元中的诸如BGA器件的安装部件和印刷布线基板之间堆叠导电或焊料凸块。 在相邻的堆叠的导电凸块之间插入插入件或继电器基板。 插入器基板由多孔材料制成。 当在印刷布线基板和安装部件之间产生膨胀差异时，插入器基板的一侧接收相对较小的位移力，同时插入器基板的另一侧接收相对较大的位移力。 剪切应力在内插衬底中被诱发。 多孔材料的变形用于吸收中介层基板中的剪切应力。 接合在插入器基板的一侧上的导电凸块以及接合在插入器基板的另一侧上的导电凸起可以减轻剪切应力。 因此，能够提高导电性凸块的耐久性。 允许导电凸块在更长的持续时间内保持更强的粘合。

公开(公告)号：US20110291293A1

公开(公告)日：2011-12-01

申请号：US13118650

申请日：2011-05-31

Applicant: Risto Tuominen ,  Petteri Palm ,  Antti Iihola

Inventor： Risto Tuominen ,  Petteri Palm ,  Antti Iihola

IPC: H01L23/48

CPC classification number: H05K1/188 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/05 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L25/0652 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/83005 ,  H01L2224/83132 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83855 ,  H01L2224/92144 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15747 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K1/0366 ,  H05K1/115 ,  H05K1/185 ,  H05K3/38 ,  H05K3/4611 ,  H05K2201/0355 ,  H05K2201/068 ,  H05K2203/063 ,  H05K2203/1469 ,  Y10T29/4913 ,  H01L2924/00

Abstract: This publication discloses an electronic module and a method for manufacturing an electronic module, in which a component (6) is glued (5) to the surface of a conductive layer, from which conductive layer conductive patterns (14) are later formed. After gluing the component (6), an insulating-material layer (1), which surrounds the component (6) attached to the conductive layer, is formed on, or attached to the surface of the conductive layer. After the gluing of the component (6), feed-throughs are also made, through which electrical contacts can be made between the conductive layer and the contact zones (7) of the component. After this, conductive patterns (14) are made from the conductive layer, to the surface of which the component (6) is glued.

Abstract translation: 该出版物公开了一种用于制造电子模块的电子模块和方法，其中将组件（6）胶合（5）到导电层的表面，稍后形成导电层导电图案（14）。 在粘合组件（6）之后，在导电层的表面上形成或附着到导电层的表面上的围绕附着在导电层上的部件（6）的绝缘材料层（1）。 在组件（6）的胶合之后，还制成馈通，通过它可以在导电层和部件的接触区域（7）之间形成电接触。 此后，导电图案（14）由导电层制成，其表面部件（6）被胶合。

公开(公告)号：US08058562B2

公开(公告)日：2011-11-15

申请号：US12337965

申请日：2008-12-18

Applicant: Toshiyuki Kuramochi

Inventor： Toshiyuki Kuramochi

IPC: H05K1/00

CPC classification number: H05K1/0271 ,  H05K3/4602 ,  H05K3/4694 ,  H05K2201/0187 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/09972 ,  Y10T29/49124

Abstract: A wiring substrate is provided. The wiring substrate includes: a core layer in which a gap is formed; and a lamination layer which includes an insulating layer and a wiring layer and which is formed on at least one surface of the core layer. The lamination layer has a thermal expansion coefficient different from that of the core layer. A plurality of mounting regions on which an electronic component is to be mounted are provided on the lamination layer to be spaced from each other. The gap in the core layer is filled with an insulating member having the same material as the insulating layer and surrounds each of the plurality of mounting regions or each of mounting region groups including one or more of the mounting regions.

Abstract translation: 提供布线基板。 布线基板包括：形成有间隙的芯层; 以及层叠层，其包括绝缘层和布线层，并且形成在所述芯层的至少一个表面上。 层叠层的热膨胀系数与芯层的热膨胀系数不同。 要在其上安装电子部件的多个安装区域设置在层压层上以彼此间隔开。 芯层中的间隙填充有与绝缘层具有相同材料的绝缘构件，并且围绕多个安装区域中的每一个或包括一个或多个安装区域的每个安装区域组。

公开(公告)号：US07986035B2

公开(公告)日：2011-07-26

申请号：US12382546

申请日：2009-03-18

Applicant: Yuichi Miyagawa

Inventor： Yuichi Miyagawa

IPC: H01L23/02

CPC classification number: H01L23/49822 ,  H01L23/49894 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/068 ,  H05K2201/09136 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A multilayer wiring substrate included in the semiconductor package includes: a first insulating layer and a second insulating layer, in which wiring layers are respectively provided on the upper and the lower surfaces; and; a core layer provided between the first insulating layer and the second insulating layer. The first insulating layer and the second insulating layer are constituted by different materials from each other.

Abstract translation: 包括在半导体封装中的多层布线基板包括：第一绝缘层和第二绝缘层，其中布线层分别设置在上表面和下表面上; 和; 芯层，设置在第一绝缘层和第二绝缘层之间。 第一绝缘层和第二绝缘层由彼此不同的材料构成。

公开(公告)号：US20110173806A1

公开(公告)日：2011-07-21

申请号：US13009802

申请日：2011-01-19

Applicant: Robert Flemming ,  Lex Kowsowsky ,  Shurui Shang ,  Bhret Graydon ,  Xiaofeng Chen ,  Glen Irvin

Inventor： Robert Flemming ,  Lex Kowsowsky ,  Shurui Shang ,  Bhret Graydon ,  Xiaofeng Chen ,  Glen Irvin

IPC: H05K3/00

CPC classification number: H05K1/0259 ,  H05K1/0271 ,  H05K1/036 ,  H05K1/0373 ,  H05K3/0005 ,  H05K2201/068 ,  H05K2201/0738 ,  H05K2201/09136 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T156/10

Abstract: A method for designing a printed circuit board to meet a specification is described. A first voltage switchable dielectric material is placed in apposition with a first copper foil. A second voltage switchable dielectric material is placed in apposition with a second copper foil. An arcuate portion of the first copper foil is placed in apposition with a first side of an aluminum member, an adhesive substance being situated between the first copper foil and the first side of the aluminum member. An arcuate portion of the second copper foil in is placed apposition with a second side of the aluminum member, an adhesive substance being situated between the second copper foil and the second side of the aluminum member.

Abstract translation: 描述了一种用于设计符合规格的印刷电路板的方法。 第一电压可切换电介质材料与第一铜箔一起放置。 第二可电压切换电介质材料与第二铜箔一起放置。 第一铜箔的弓形部分与铝构件的第一侧相配合，粘合剂物质位于第一铜箔和铝构件的第一侧之间。 第二铜箔的弧形部分与铝构件的第二侧配合，粘合剂物质位于第二铜箔和铝构件的第二侧之间。

公开(公告)号：US20110132644A1

公开(公告)日：2011-06-09

申请号：US12994507

申请日：2009-05-21

Applicant: Taiki Nishi ,  Takeshi Miyakawa ,  Kiyokazu Yamazaki ,  Takashi Saiki

Inventor： Taiki Nishi ,  Takeshi Miyakawa ,  Kiyokazu Yamazaki ,  Takashi Saiki

IPC: H05K1/03

CPC classification number: H05K1/056 ,  F21K9/00 ,  H01L25/0753 ,  H01L33/46 ,  H01L33/60 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0274 ,  H05K3/0061 ,  H05K3/285 ,  H05K2201/0209 ,  H05K2201/068 ,  H05K2201/09781 ,  H05K2201/10106 ,  H05K2201/2054 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49165 ,  Y10T428/12569 ,  Y10T428/24917 ,  Y10T428/24926 ,  Y10T428/252 ,  H01L2924/00

Abstract: Lifespan of LEDs can be lengthened, and the workability of the printed circuit board during circuit formation and during LED mounting can be improved.A metal base circuit board, having an insulating layer with a linear expansion coefficient of 60 ppm per degree C. or higher and 120 ppm per degree C. or lower, a metal foil provided on one side of the insulating layer, comprising a metal material with a linear expansion coefficient of 10 ppm per degree C. or higher and 35 ppm per degree C. or lower, a circuit portion and a non-circuit potion having a linear expansion coefficient of 10 ppm per degree C. or higher and 35 ppm per degree C. or lower, and a white film formed on top of the insulating layer, circuit portion, and non-circuit portion, the total sum of the areas of the non-circuit portion and the circuit portion on top of the insulating layer being 50% or higher and 95% or lower relative to the area of the metal foil, and the relation between the linear expansion coefficients of each of the materials being: linear expansion coefficient of insulating layer>linear expansion coefficient of metal foil>linear expansion coefficient of circuit portion and non-circuit portion.

Abstract translation: LED的寿命可以延长，并且可以提高电路形成期间和LED安装期间印刷电路板的可加工性。 一种金属基底电路板，具有线性膨胀系数为60ppm /℃以上且120ppm /℃以下的绝缘层，设置在绝缘层一侧的金属箔，其包含金属材料 线性膨胀系数为10ppm /℃以上，35ppm /℃以下，具有线性膨胀系数为10ppm /℃以上且35ppm的电路部分和非电路部分 以及形成在绝缘层，电路部分和非电路部分之上的白色膜，绝缘层顶部的非电路部分和电路部分的面积的总和 相对于金属箔的面积为50％以上且95％以下，各材料的线膨胀系数之间的关系为：绝缘层的线膨胀系数>金属箔的线膨胀系数>线膨胀 系数o f电路部分和非电路部分。

公开(公告)号：US20110076472A1

公开(公告)日：2011-03-31

申请号：US12655516

申请日：2009-12-30

Applicant: Jin Ho Kim ,  Seok Kyu Lee ,  Jae Joon Lee ,  Sung Won Jeong

Inventor： Jin Ho Kim ,  Seok Kyu Lee ,  Jae Joon Lee ,  Sung Won Jeong

IPC: B32B7/02

CPC classification number: H05K3/4682 ,  H01L23/49822 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K2201/0352 ,  H05K2201/068 ,  Y10T428/2495 ,  H01L2924/00

Abstract: Disclosed is a package substrate, in which the plating area of a first plating layer formed on a layer which is to be connected to a motherboard is larger than the plating area of a second plating layer formed on a layer which is to be connected to an electronic part, and the plating thickness of the second plating layer is greater than the plating thickness of the first plating layer, thus balancing the plating volumes of the plating layers formed on the layers of the package substrate, thereby minimizing warpage of the package substrate which results from the coefficients of thermal expansion being different.

Abstract translation: 公开了一种封装基板，其中形成在要连接到母板的层上的第一镀层的电镀面积大于形成在要连接到母板的层上的第二镀层的镀覆面积 电子部分，并且第二镀层的镀层厚度大于第一镀层的镀层厚度，从而平衡形成在包装衬底的层上的镀层的镀层体积，从而最小化封装衬底的翘曲 来自热膨胀系数的结果不同。

公开(公告)号：US07871691B2

公开(公告)日：2011-01-18

申请号：US11596476

申请日：2005-05-12

Applicant: Katsuyuki Hashimoto ,  Tetsuo Yoshida ,  Makoto Tsuji ,  Shinya Togano

Inventor： Katsuyuki Hashimoto ,  Tetsuo Yoshida ,  Makoto Tsuji ,  Shinya Togano

IPC: B32B7/02 ,  B32B27/18 ,  B32B27/20 ,  B32B27/36

CPC classification number: C08J5/18 ,  B29K2067/00 ,  C08J2367/02 ,  H05K1/0326 ,  H05K1/0393 ,  H05K2201/0145 ,  H05K2201/068 ,  Y10S428/91 ,  Y10T428/24355 ,  Y10T428/24942 ,  Y10T428/2495 ,  Y10T428/24967 ,  Y10T428/26 ,  Y10T428/269 ,  Y10T428/31786

Abstract: An object of the invention is to provide such an oriented polyester film that has a constant thickness, and is excellent in dimensional stability at a high temperature and dimensional stability to temperature change in a working temperature range. The invention relates to an oriented polyester film containing as a major component of a substrate layer polyethylene -2,6-naphthalene dicarboxylate, being stretched at least in one direction, and having a film thickness of from 12 to 250 μm, wherein (1) a coefficient of linear thermal expansion αt at a temperature of from 30 to 100° C. is from 0 to 15 ppm/° C. in both longitudinal and width directions of the film, and (2) a thermal shrinkage rate at 100° C. for 10 minutes is 0.5% or less in both longitudinal and width directions of the film.

Abstract translation: 本发明的目的是提供一种具有恒定厚度并且在高温下的尺寸稳定性优异且在工作温度范围内的温度变化的尺寸稳定性的定向聚酯膜。 本发明涉及一种取向聚酯薄膜，其包含至少在一个方向上拉伸的层间聚乙烯-2,6-萘二甲酸酯作为主要组分，膜厚为12至250μm，其中（1） 在30至100℃的温度下的线性热膨胀系数αt在膜的纵向和宽度方向上为0至15ppm /℃，（2）在100℃下的热收缩率 10分钟在膜的纵向和宽度方向上为0.5％或更小。

公开(公告)号：US20100327897A1

公开(公告)日：2010-12-30

申请号：US12735929

申请日：2009-02-26

Applicant: Toshio Kazama ,  Hiroshi Nakayama ,  Shinya Miyaji ,  Kohei Suzuki

Inventor： Toshio Kazama ,  Hiroshi Nakayama ,  Shinya Miyaji ,  Kohei Suzuki

IPC: G01R1/073 ,  G01R31/26 ,  H05K1/00

CPC classification number: G01R1/07378 ,  G01R31/2889 ,  H05K3/4605 ,  H05K3/467 ,  H05K2201/068

Abstract: A wiring substrate that allows wiring at a fine pitch and has a coefficient of thermal expansion close to the coefficient of thermal expansion of silicone, and a probe card that includes the wiring substrate are provided. To this end, there are provided a wiring substrate that includes a ceramic substrate having a coefficient of thermal expansion of 3×10−6 to 5×10−6/° C. and one or more thin-film wiring sheets stacked on one surface of the ceramic substrate, and a probe head on which a plurality of conductive proves are arranged in accordance with wiring on the thin-film wiring sheet, which holds individual probes while preventing the probes from coming off and allowing both ends of each probe to be exposed, and which is stacked on the wiring substrate while one end of each probe is brought into contact with the thin-film wiring sheet.

Abstract translation: 提供允许以细间距布线并且具有接近硅树脂的热膨胀系数的热膨胀系数的布线基板和包括布线基板的探针卡。 为此，提供一种布线基板，其包括具有3×10-6〜5×10-6 /℃的热膨胀系数的陶瓷基板和在一个面上堆叠的一个以上的薄膜布线片 的陶瓷基板，以及探针头，根据薄膜布线片上的布线布置有多个导电证明物，该探针头保持各个探针，同时防止探针脱落并且允许每个探针的两端为 暴露，并且在每个探针的一端与薄膜布线片接触的同时在布线基板上层叠。