Method for forming film pattern, and method for manufacturing device, electro-optical device, electronic apparatus and active matrix substrate
    101.
    发明授权
    Method for forming film pattern, and method for manufacturing device, electro-optical device, electronic apparatus and active matrix substrate 失效
    用于形成膜图案的方法以及制造装置,电光装置,电子装置和有源矩阵基板的方法

    公开(公告)号:US07691562B2

    公开(公告)日:2010-04-06

    申请号:US11458531

    申请日:2006-07-19

    Abstract: A method for forming a film pattern, comprises: disposing a first bank forming material to a substrate so as to form a first bank layer; disposing a second bank forming material on the first bank layer so as to form a second bank layer; and pattering the first bank layer and the second bank layer so as to form a bank including a pattern forming region having a first pattern forming region and a second pattern forming region, the second pattern forming region having a width larger than a width of the first pattern forming region, and being continuously formed from the first pattern forming region, wherein the first bank layer has a sidewall facing the pattern forming region and a first contact angle of less than 50 degrees with respect to a functional liquid containing H2O on the sidewall, and the second bank layer has a second contact angle larger than the first contact angle with respect to the functional liquid.

    Abstract translation: 一种形成膜图案的方法,包括:将第一堤形成材料设置在基板上以形成第一堤层; 在第一堤层上设置第二堤形成材料,以形成第二堤层; 以及形成第一堤层和第二堤层以形成包括具有第一图案形成区域和第二图案形成区域的图案形成区域的堤岸,第二图案形成区域的宽度大于第一图案形成区域的宽度, 图案形成区域,并且从第一图案形成区域连续形成,其中第一堤层具有面向图案形成区域的侧壁和相对于在侧壁上含有H 2 O的功能液体的第一接触角小于50度, 并且所述第二堤层相对于所述功能液体具有大于所述第一接触角的第二接触角。

    FLEX CIRCUIT ASSEMBLY WITH A DUMMY TRACE BETWEEN TWO SIGNAL TRACES
    102.
    发明申请
    FLEX CIRCUIT ASSEMBLY WITH A DUMMY TRACE BETWEEN TWO SIGNAL TRACES 有权
    FLEX电路组件与两个信号跟踪之间的双向跟踪

    公开(公告)号:US20100078200A1

    公开(公告)日:2010-04-01

    申请号:US12242408

    申请日:2008-09-30

    Applicant: Jr-Yi SHEN

    Inventor: Jr-Yi SHEN

    Abstract: A flex circuit comprises a base film, a first adhesive layer coupled with the base film, at least two signal traces coupled with the first adhesive layer, and at least one dummy trace positioned between the two signal traces and coupled with the first adhesive layer. The flex circuit comprises a second adhesive layer coupled with the signal traces, the dummy trace, and the first adhesive layer, and a cover film coupled with the second adhesive layer.

    Abstract translation: 柔性电路包括基膜,与基膜结合的第一粘合剂层,与第一粘合剂层耦合的至少两个信号迹线以及位于两个信号迹线之间并与第一粘合剂层耦合的至少一个虚拟迹线。 柔性电路包括与信号迹线,虚拟迹线和第一粘合剂层耦合的第二粘合剂层和与第二粘合剂层耦合的覆盖膜。

    FLEXIBLE CIRCUIT BOARD
    103.
    发明申请
    FLEXIBLE CIRCUIT BOARD 有权
    柔性电路板

    公开(公告)号:US20100025083A1

    公开(公告)日:2010-02-04

    申请号:US12182294

    申请日:2008-07-30

    Applicant: Kai-Chi Yang

    Inventor: Kai-Chi Yang

    CPC classification number: H05K1/028 H05K2201/09727 H05K2201/10681

    Abstract: A flexible circuit board uses a specific structure to alleviate mechanical stress thereof. The flexible circuit board has a flexible film, a plurality of inner leads, a plurality of outer leads, and a plurality of connection portion. Each of the connection portions a corresponding one of the inner leads with a corresponding one of the outer leads. A first width of the inner leads is greater than a second width of the outer leads. Due to rounded concave sections and rounded convex sections of the connection portions, if the flexible circuit board is bent, the mechanical stress around corners of joint portions of the connection portions with the inner leads and the outer leads could be alleviated.

    Abstract translation: 柔性电路板使用特定结构来减轻其机械应力。 柔性电路板具有柔性膜,多个内引线,多个外引线和多个连接部。 每个连接部分相应的一个内引线与相应的外引线之一。 内引线的第一宽度大于外引线的第二宽度。 由于连接部分的圆形凹部和圆形凸起部分,如果柔性电路板弯曲,则可以减轻连接部分与内部引线和外部引线的接合部分的拐角附近的机械应力。

    Tab tape for tape carrier package
    106.
    发明申请
    Tab tape for tape carrier package 有权
    贴带胶带用于胶带载体包装

    公开(公告)号:US20100000767A1

    公开(公告)日:2010-01-07

    申请号:US12458936

    申请日:2009-07-28

    Abstract: A TAB tape for a tape carrier package may have at least one opening formed in a connection portion. The at least one opening may be provided in the connection portion and a portion of the corresponding second lead. The at least one opening may be arranged near a boundary between the corresponding first lead and the connection portion. The at least one opening may be sized to reduce the change of the lead width from the first lead to the second lead.

    Abstract translation: 用于带载包装的TAB带可以具有形成在连接部分中的至少一个开口。 所述至少一个开口可以设置在连接部分和对应的第二引线的一部分中。 至少一个开口可以布置在相应的第一引线和连接部分之间的边界附近。 所述至少一个开口的尺寸可被设计成减小引线宽度从第一引线到第二引线的变化。

    Integrated Circuit Transmission Lines, Methods for Designing Integrated Circuits Using the Same and Methods to Improve Return Loss
    107.
    发明申请
    Integrated Circuit Transmission Lines, Methods for Designing Integrated Circuits Using the Same and Methods to Improve Return Loss 有权
    集成电路传输线,使用该集成电路的集成电路设计方法和提高回波损耗的方法

    公开(公告)号:US20090284324A1

    公开(公告)日:2009-11-19

    申请号:US12122426

    申请日:2008-05-16

    CPC classification number: H05K1/0237 H05K2201/09236 H05K2201/09727

    Abstract: Integrated circuit transmission lines are designed to match elements at opposing ends of the transmission line over a frequency range of interest. By modifying characteristics of the transmission line over the length of the transmission line, from a first end coupled to a first external element to a second end coupled to a second external element, return loss is improved. In various embodiments one or more of the width of the conductors and the distance between adjacent edges of the conductors are modified across the length of the transmission line. In an alternative embodiment, the conductors of the transmission line are segmented with each segment having a length and a width across the segment.

    Abstract translation: 集成电路传输线被设计成在感兴趣的频率范围上匹配传输线的相对端处的元件。 通过在传输线的长度上修改传输线的特性,从耦合到第一外部元件的第一端到耦合到第二外部元件的第二端,返回损耗得到改善。 在各种实施例中,导体的宽度中的一个或多个以及导体的相邻边缘之间的距离在传输线的长度上被修改。 在替代实施例中,传输线的导体被分段,每个段具有横跨该段的长度和宽度。

    ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE
    108.
    发明申请
    ARRAY SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE 有权
    用于液晶显示装置的阵列基板

    公开(公告)号:US20090167654A1

    公开(公告)日:2009-07-02

    申请号:US12330720

    申请日:2008-12-09

    Abstract: An array substrate for a liquid crystal display device includes a substrate including a display area and a non-display area, the non-display area having a link area and a pad area, array elements in the display area on the substrate, first to nth pads in the pad area (n is a natural number), first to nth link lines in the link area and connected to the first to nth pads, respectively, wherein the first to (n/2−1)th link lines are symmetrical with the nth to (n/2+1)th link lines with respect to (n/2)th link line, the first to (n/2−1)th link lines have inclined portions, and the inclined portions of the first to kth link lines have decreasing widths and decreasing lengths toward the kth link line from the first link line, wherein k is larger than 1 and smaller than (n/2).

    Abstract translation: 一种液晶显示装置用阵列基板,具备包括显示区域和非显示区域的基板,所述非显示区域具有连接区域和焊盘区域,所述基板的显示区域中的阵列元件,第一至第n 焊盘区域中的焊盘(n是自然数),分别在链路区域中的第一至第n个链路线并分别连接到第一至第n个焊盘,其中第一到第(n / 2-1)个链路线与 第(n / 2)个连接线相对于第(n / 2)个连接线,第一至第(n / 2-1)个连接线具有倾斜部分,并且第一至第 第k个链路线具有从第一链路线到第k个链路线的宽度减小和长度减小,其中k大于1且小于(n / 2)。

    Integrated Circuit Package for High-Speed Signals
    109.
    发明申请
    Integrated Circuit Package for High-Speed Signals 有权
    用于高速信号的集成电路封装

    公开(公告)号:US20090152689A1

    公开(公告)日:2009-06-18

    申请号:US12060387

    申请日:2008-04-01

    Abstract: An integrated circuit package having a multi-segment transmission line transformer for impedance matching a packaged integrated circuit, such as a driver or receiver, to a printed circuit board (PCB) transmission line to which the packaged chip is attached by, for example, solder balls. In one exemplary embodiment, a three-segment transmission line transformer provides improved broadband performance with the advantage of having a middle segment with a flexible length for easier routing. The length of each end segment of the three-segment transformer is adjusted to provide at least partial cancellation of reflections between the PCB and the transformer, and between the transformer and a circuit on the integrated circuit, respectively. Further, the inductive reactance of the solder balls and via wiring may be cancelled out by the transformed chip impedance to provide a non-inductive termination to the PCB transmission line at approximately one-half the highest data rate of the channel.

    Abstract translation: 一种具有多段传输线变压器的集成电路封装,用于将封装集成电路(例如驱动器或接收器)与包装芯片通过例如焊料连接到的印刷电路板(PCB)传输线进行阻抗匹配 球。 在一个示例性实施例中,三段式传输线变压器提供了改进的宽带性能,其优点在于具有具有灵活长度的中间段以便于路由。 三段式变压器的每个端段的长度被调整以分别提供PCB和变压器之间以及变压器与集成电路上的电路之间的反射的至少部分消除。 此外,焊球和通孔布线的感抗可能被转换的芯片阻抗抵消,以便以通道的最高数据速率的大约一半提供对PCB传输线的非感性端接。

    Motherboard
    110.
    发明授权
    Motherboard 失效
    母板

    公开(公告)号:US07542260B2

    公开(公告)日:2009-06-02

    申请号:US11748505

    申请日:2007-05-15

    Abstract: A motherboard includes a printed circuit board (10), and at least a power/ground trace (20) formed on the printed circuit board. The trace includes a pair of main lines (14, 24) and at least a protection line (12, 22) connected between the main lines. A width of the main lines is constant and wider than of the protection line. Wherein when a current flowing through the power/ground trace exceeds a maximum current the protection line can endure, the protection line is burnt and disconnected from the main lines, thereby generating less smoke and protecting components connected with the trace of the motherboard from damage due to excess current.

    Abstract translation: 主板包括印刷电路板(10)和至少形成在印刷电路板上的电源/接地迹线(20)。 迹线包括一对主线(14,24)和至少连接在主线之间的保护线(12,22)。 主线的宽度是恒定的,比保护线宽。 其中当流过电源/接地迹线的电流超过保护线路可以承受的最大电流时,保护线路与主线路相连燃烧和断开,从而产生较少的烟雾,并保护与母板的痕迹相连的部件免受损坏 过电流。

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