METHOD FOR DETECTING COAL QUALITY USING RAMAN SPECTROSCOPY

    公开(公告)号:US20190154585A1

    公开(公告)日:2019-05-23

    申请号:US16247544

    申请日:2019-01-14

    Abstract: A method for detecting coal quality, including: selecting a plurality of standard coals, acquiring Raman spectral characteristic parameters of each standard coal and characteristic parameters of coal quality components of each standard coal, calculating a mapping relationship between the Raman spectral characteristic parameters and the characteristic parameters of the coal quality components of each standard coal, to establish a relational database of the Raman spectral characteristic parameters and the characteristic parameters of the coal quality components; providing coal to be analyzed, conducting Raman spectroscopy on the coal to yield Raman spectrum of the coal, and performing curve-fitting calculation on the Raman spectrum of the coal to obtain Raman spectral characteristic parameters of the coal; and comparing the Raman spectral characteristic parameters of the coal with the Raman spectral characteristic parameters of the relational database.

    Aerodynamic optical effect correction and identification integrated real-time processing system and method

    公开(公告)号:US10297013B2

    公开(公告)日:2019-05-21

    申请号:US15576847

    申请日:2016-04-13

    Abstract: An aerodynamic optical effect correction and identification integrated real-time processing system, comprising an FPGA module, a multi-core main processor DSP, a plurality of auxiliary processors ASICs and an infrared image non-uniformity correction system-on-chip (SoC). By means of the system, full-image thermal radiation correction, denoising, transmission effect correction and target detection processes of an aerodynamic optical effect degradation image are achieved. Correspondingly, provided is the corresponding method. The system effectively solves the problem of aerodynamic optical effect and the problem of the requirement for a short detection time interval of the processor in an aircraft flying at a high speed; due to the adoption of the independently researched and developed ASIC, the real-time property of the whole system is greatly improved; all tasks are rationally distributed and a multi-core parallel mode is adopted, so the image processing time is greatly shortened; and meanwhile, the FPGA module connects all units to form a closed-loop system, so that the system stability is further improved.

    DYNAMIC CALIBRATION METHOD FOR ECHELLE SPECTROMETER IN LASER-INDUCED BREAKDOWN SPECTROSCOPY

    公开(公告)号:US20190003887A1

    公开(公告)日:2019-01-03

    申请号:US15771338

    申请日:2017-04-24

    Abstract: The present invention belongs to the technical field of elemental analysis, and more particularly, relates to a dynamic calibration method for echelle spectrometer in laser-induced breakdown spectroscopy, comprising: S1: collecting a standard light source by using an echelle spectrometer; S2: in combination with a calibration function, calculating a pixel position coordinate ({circumflex over (x)}, ŷ) corresponding to a spectral wavelength ŵ; S3: performing dynamic searching and filtering near the pixel position coordinate ({circumflex over (x)}, ŷ) to obtain a set D of all pixel position coordinates, and adjusting all original intensity values in the set D to obtain intensity values F(Ix,y), and S4: calculating a spectral line intensity value after dynamic calibration by summing the adjusted intensity values F(Ix,y), thereby completing dynamic calibration of the result of the echelle spectrometer. The method in the present invention can overcome the shortcoming, i.e., the existing echelle spectrometer is only calibrated before measurement without solving the spectral line drift during use, increasing the absolute intensity of the wavelength and reducing the detection limit of the quantitative analysis, as well as improving the precision of the quantitative analysis of an element to be analyzed.

    ULTRASONIC MATERIAL, METHOD FOR PREPARING THE MATERIAL, AND ULTRASONIC PROBE COMPRISING THE MATERIAL

    公开(公告)号:US20180345044A1

    公开(公告)日:2018-12-06

    申请号:US15712099

    申请日:2017-09-21

    Abstract: A method for preparing an ultrasonic material, including: 1) mixing methyl ethyl ketone with ethyl alcohol to prepare an azeotropic mixture; uniformly mixing carbon nanotube powders with a dispersant in the azeotropic mixture to yield a dispersoid; drying the dispersoid to yield dry carbon nanotube powders; 2) mixing the dry carbon nanotube powders in 1) with a light-cured resin to form a sizing mixture; 3) evenly distributing the sizing mixture in 2) over a plane of a mask image projection based stereo lithography apparatus to form a sizing mixture layer; 4) switching a design model of focused light-induced ultrasonic material to a two-dimensional image; projecting the two-dimensional image on a surface of the sizing mixture layer in 3); 5) exposing the sizing mixture layer in 3) under visible light and solidifying the sizing mixture layer; and 6) repeating 3)-5) to complete printing of the ultrasonic material.

    Method for generating row transposed architecture based on two-dimensional FFT processor

    公开(公告)号:US09965386B2

    公开(公告)日:2018-05-08

    申请号:US15233601

    申请日:2016-08-10

    CPC classification number: G06F12/06 G06F12/0207 G06F17/142 G06F2212/1016

    Abstract: The invention discloses a method for generating a row transposed architecture based on a two-dimensional FFT processor, comprising the following characteristic: the FFT processor includes an on-chip row transposition memory for storing an image row transposition result. When the size of the row transposition result exceeds the capacity of the on-chip memory, the first 2k data of a row of the two-dimensional array after row transformation is written into the on-chip row transposition memory, the remaining data is written into the off-chip SDRAM, and k is acquired through calculation according to the row transposition result and the capacity of the on-chip row transposition memory. The on-chip memory is divided into two memories A and B used for storing the row transposition partial result and temporarily storing data read from off-chip SDRAM. When data is read from the memory A or B column by column for FFT column transposition, SDRAM is accessed in a row burst manner and data is written into the empty memory A or B alternately, and finally SDRAM is empty through repetitive ping-pong switching between the memories A and B. The row transposed architecture is capable of substantially reducing cross-line accessing frequency of SDRAM and improving two-dimensional FFT execution speed.

    METHOD FOR GENERATING ROW TRANSPOSED ARCHITECTURE BASED ON TWO-DIMENSIONAL FFT PROCESSOR

    公开(公告)号:US20170337129A1

    公开(公告)日:2017-11-23

    申请号:US15233601

    申请日:2016-08-10

    CPC classification number: G06F12/06 G06F12/0207 G06F17/142 G06F2212/1016

    Abstract: The invention discloses a method for generating a row transposed architecture based on a two-dimensional FFT processor, comprising the following characteristic: the FFT processor includes an on-chip row transposition memory for storing an image row transposition result. When the size of the row transposition result exceeds the capacity of the on-chip memory, the first 2k data of a row of the two-dimensional array after row transformation is written into the on-chip row transposition memory, the remaining data is written into the off-chip SDRAM, and k is acquired through calculation according to the row transposition result and the capacity of the on-chip row transposition memory. The on-chip memory is divided into two memories A and B used for storing the row transposition partial result and temporarily storing data read from off-chip SDRAM. When data is read from the memory A or B column by column for FFT column transposition, SDRAM is accessed in a row burst manner and data is written into the empty memory A or B alternately, and finally SDRAM is empty through repetitive ping-pong switching between the memories A and B. The row transposed architecture is capable of substantially reducing cross-line accessing frequency of SDRAM and improving two-dimensional FFT execution speed.

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