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    SFQ-based Pulse-conserving Logic Gates
    111.
    发明公开
    SFQ-based Pulse-conserving Logic Gates 审中-公开

    公开(公告)号：US20240039541A1

    公开(公告)日：2024-02-01

    申请号：US17815368

    申请日：2022-07-27

    Applicant: IMEC VZW

    Inventor： Quentin Paul Herr ,  Anna Yurievna Herr

    IPC: H03K19/23 ,  H03K19/17736 ,  H01L39/24

    CPC classification number: H03K19/23 ,  H03K19/1774 ,  H01L39/2493

    Abstract: Josephson junction based logic devices and methods for their use are described. An example Josephson junction based logic device includes a two-input OR/AND (OA2) gate. The OA2 gate includes a first input node inductively coupled to a first input source and a second input node inductively coupled to a second input source. The first and second input sources are configured to provide single-flux-quantum (SFQ) pulses. The OA2 gate also includes first plurality of inductors coupled between the first input node and one of: a first output node or a second output node. The OA2 gate additionally includes a second plurality of inductors coupled between the second input node and one of: the first or the second output nodes. The OA2 gate also includes Josephson junctions coupled between a common node and one of: the first or the second input node, or the first or the second output node.

    SUPERCONDUCTIVE INTERCONNECT STRUCTURE
    112.
    发明公开
    SUPERCONDUCTIVE INTERCONNECT STRUCTURE 审中-公开

    公开(公告)号：US20240038589A1

    公开(公告)日：2024-02-01

    申请号：US17877500

    申请日：2022-07-29

    Applicant: IMEC VZW

    Inventor： Anna Yurievna HERR ,  Quentin Paul HERR ,  Zsolt TOKEI ,  Anshul GUPTA

    IPC: H01L21/768 ,  H01L23/522

    CPC classification number: H01L21/76897 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/53285

    Abstract: A method for forming a superconducting interconnect structure, comprising: providing a substrate, forming a superconductive layer, forming a layer of a first dielectric material, removing parts of the layer of the first dielectric material and of the superconductive layer so as to form a pattern comprising a first set of line structures comprising: a first set of superconductive line structures, and a first set of line structures made of the first dielectric material, forming a second dielectric material between the line structures of the first set, forming a layer formed of a third dielectric material, providing a patterned mask, transferring the pattern into the first dielectric material and into the layer formed of the third dielectric material, so as to form the at least one via hole, removing the patterned mask, and forming a superconductive material layer so as to form at least one via.

    Method for Forming an Interconnect Structure
    113.
    发明公开
    Method for Forming an Interconnect Structure 审中-公开

    公开(公告)号：US20240036470A1

    公开(公告)日：2024-02-01

    申请号：US18356700

    申请日：2023-07-21

    Applicant: IMEC VZW

    Inventor： Waikin Li ,  Zheng Tao

    IPC: G03F7/11 ,  G03F7/00 ,  G03F1/38 ,  G03F1/56 ,  G03F7/09

    CPC classification number: G03F7/11 ,  G03F7/0035 ,  G03F1/38 ,  G03F1/56 ,  G03F7/094

    Abstract: A method is provided for forming an interconnect structure for an integrated circuit. The method includes: forming a metal layer over a substrate; forming a hard mask layer over the metal layer; forming a first resist layer of a first resist material over the hard mask layer and patterning the first resist layer in a first lithography process to define a first resist pattern; forming over the first resist pattern a second resist layer of a second resist material different from the first resist material and patterning the second resist layer in a second lithography process to define a second resist pattern of resist lines extending in parallel along a first direction, wherein at least a portion of the first resist pattern is overlapped by the second resist pattern; patterning the hard mask layer using the second resist pattern as an etch mask to define a hard mask line pattern underneath the second resist pattern, and subsequently the metal layer to define a metal line pattern underneath the hard mask line pattern; removing the second resist pattern and subsequently patterning the hard mask line pattern using said at least a portion of the first resist pattern as an etch mask to define a hard mask pillar pattern over the metal line pattern; and forming a metal pillar pattern in accordance with the hard mask pillar pattern.

    PROBE, A SYSTEM AND A METHOD FOR ANALYSIS OF A LIQUID IN A MIXTURE OF THE LIQUID AND SOLID SUBSTANCE
    114.
    发明公开
    PROBE, A SYSTEM AND A METHOD FOR ANALYSIS OF A LIQUID IN A MIXTURE OF THE LIQUID AND SOLID SUBSTANCE 审中-公开

    公开(公告)号：US20240035964A1

    公开(公告)日：2024-02-01

    申请号：US18224135

    申请日：2023-07-20

    Applicant: Stichting Imec Nederland

    Inventor： Mark ZENTILE ,  Xu Zhang ,  Peter Offermans ,  David Young ,  Arjan Tibbe

    IPC: G01N21/41

    CPC classification number: G01N21/4133 ,  G01N2201/08

    Abstract: According to an aspect of the present inventive concept there is provided a probe for analysis of a liquid in a mixture of the liquid and solid substance. The probe comprises: a tube comprising a sample end configured to be inserted into the mixture; a cap configured to come into contact with the mixture at the sample end, the cap comprising one or more openings configured for allowing passage of the liquid therethrough, and for preventing passage of the solid substance therethrough; and an optical measurement head arranged in the tube and configured to come into contact with the liquid having passed the one or more openings, wherein the optical measurement head is configured to collect measurement information for analysis of the liquid.

    Bit Cell for Static Random Access Memory
    118.
    发明公开
    Bit Cell for Static Random Access Memory 审中-公开

    公开(公告)号：US20230413504A1

    公开(公告)日：2023-12-21

    申请号：US18335310

    申请日：2023-06-15

    Applicant: IMEC VZW ,  Katholieke Universiteit Leuven

    Inventor： Hsiao-Hsuan Liu ,  Shairfe Muhammad Salahuddin ,  Boon Teik Chan

    IPC: H10B10/00

    CPC classification number: H10B10/125

    Abstract: A bit cell for a Static Random-Access Memory (SRAM) is provided that includes first and second sets of transistors. Each set of transistors includes a respective pass-gate transistor and a respectively stacked complementary transistor pair of an upper transistor and a lower transistor. A source/drain terminal of a lower transistor of each set of transistors is connected to a respective first power supply extending in a first power supply track arranged below the lower transistor, whereas a source/drain terminal of an upper transistor of each set of transistors is connected to a respective second power supply extending in a second power supply track arranged above the upper transistor.

    MIXED METAL OXIDES
    119.
    发明公开
    MIXED METAL OXIDES 审中-公开

    公开(公告)号：US20230382758A1

    公开(公告)日：2023-11-30

    申请号：US18325823

    申请日：2023-05-30

    Applicant: IMEC VZW

    Inventor： Michiel Jan van Setten ,  Geoffrey Pourtois ,  Hendrik F.W. Dekkers ,  Gouri Sankar Kar

    IPC: C01G30/00 ,  H01L29/786

    CPC classification number: C01G30/005 ,  H01L29/78693 ,  C01P2002/02

    Abstract: Mixed metal oxides and methods for making the mixed metal oxides are disclosed. A mixed metal oxide includes metal or metalloid elements including 0.50 to 0.90 parts by mole Mg, 0.05 to 0.30 parts by mole Al, 0.01 to 0.20 parts by mole Sb, and 0.00 to 0.31 parts by mole of other elements selected from metals and metalloids. The sum of all parts by mole of Mg, Al, Sb, and the other elements selected from metals and metalloids may amount to about 1.00. The mixed metal oxide additionally includes oxygen, and less than 0.01 parts by mole of non-metallic and non-metalloid impurities.

    INGESTIBLE DEVICE FOR SAMPLING MATERIAL AND METHOD FOR USING THE SAME
    120.
    发明公开
    INGESTIBLE DEVICE FOR SAMPLING MATERIAL AND METHOD FOR USING THE SAME 审中-公开

    公开(公告)号：US20230380816A1

    公开(公告)日：2023-11-30

    申请号：US18320766

    申请日：2023-05-19

    Applicant: Stichting IMEC Nederland

    Inventor： Rogier Schoeman ,  Klaus Mathwig

    IPC: A61B10/00

    CPC classification number: A61B10/0045 ,  A61B2010/0061 ,  A61B2562/162

    Abstract: An ingestible device for sampling material at least one time is provided. The ingestible device includes a first chamber that is enlargeable in volume and that includes an inlet, and that can be filled with the material to be sampled, a second chamber that is diminishable in volume and that includes an outlet, and a reversible actuating mechanism. The reversible actuating mechanism is configured such that triggering the reversible actuating mechanism leads to an enlargement of the first chamber to collect the material to be sampled through the inlet and also leads to a diminishment of the second chamber.

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