公开(公告)号：US11009387B2

公开(公告)日：2021-05-18

申请号：US16849829

申请日：2020-04-15

Applicant: PsiQuantum Corp

Inventor： Chia-Jung Chung ,  Faraz Najafi ,  George Kovall ,  Vitor R. Manfrinato ,  Vimal Kamineni ,  Mark Thompson ,  Syrus Ziai

IPC: G01J1/02 ,  G01J1/44 ,  H01B12/06

Abstract: A superconductor device according to some embodiments comprises a superconductor stack, which includes a superconductor layer and a silicon cap layer over the superconductor layer, the cap layer including amorphous silicon. The superconductor device further comprises a metal contact over a portion of the silicon cap layer and electrically-coupled to the superconductor layer. The metal contact comprises a core including a first metal, and an outer layer around the core that includes a second metal. The portion of the silicon cap layer is converted from silicon to a conductive compound including the second metal to provide low-resistance electrical coupling between the superconductor layer and the metal contact. The superconductor device further comprises a waveguide, and the first portion of the cap layer under the metal contact is at a sufficient lateral distance from the waveguide to prevent optical coupling between the metal contact and the waveguide.

公开(公告)号：US10984857B2

公开(公告)日：2021-04-20

申请号：US16543256

申请日：2019-08-16

Applicant: PSIQUANTUM CORP.

Inventor： Faraz Najafi

IPC: G11C11/44 ,  H01L39/16 ,  H01L27/18 ,  H01L39/08 ,  H01L39/10 ,  H01L39/24 ,  H01L39/12

Abstract: An electronic device (e.g., a superconducting memory cell) includes a substrate and a layer of superconducting material disposed over the substrate. The layer of superconducting material is patterned to form a plurality of distinct instances of the layer of superconducting material including: a first wire; and a loop that is (i) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state. The loop is configured to form a persistent current via the capacitive coupling in response to a write current applied to the first wire while the loop and the first wire are in the superconducting state. The persistent current represents a logic state of the electronic device.

公开(公告)号：US10944403B2

公开(公告)日：2021-03-09

申请号：US16656506

申请日：2019-10-17

Applicant: PsiQuantum Corp.

Inventor： Faraz Najafi

IPC: H03K19/195 ,  H03K19/17784 ,  H03K19/17736 ,  H03K19/17728

Abstract: The various embodiments described herein include methods, devices, and systems for operating superconducting circuitry. In one aspect, a programmable circuit includes: (1) a superconducting component arranged in a multi-dimensional array of alternating narrow and wide portions, the superconducting component having an input terminal at a first end and an output terminal at a second end opposite of the first end; and (2) control circuitry coupled to the narrow portions of the superconducting component, the control circuitry configured to transition the narrow portions between superconducting and non-superconducting states.

公开(公告)号：US20200303615A1

公开(公告)日：2020-09-24

申请号：US16813628

申请日：2020-03-09

Applicant: PsiQuantum Corp.

Inventor： Faraz Najafi

IPC: H01L39/10 ,  H01L31/00 ,  H01L39/22 ,  H01L39/18 ,  G01J1/44 ,  H01L31/0224 ,  H01L31/113 ,  H01L39/16 ,  H01L29/43 ,  H01L29/786 ,  H01L39/14

Abstract: The various embodiments described herein include methods, devices, and systems for fabricating and operating transistors. In one aspect, a transistor includes: (1) a semiconducting component configured to operate in an on state at temperatures above a semiconducting threshold temperature; and (2) a superconducting component configured to operate in a superconducting state while: (a) a temperature of the superconducting component is below a superconducting threshold temperature; and (b) a first current supplied to the superconducting component is below a current threshold; where: (i) the semiconducting component is located adjacent to the superconducting component; and (ii) in response to a first input voltage, the semiconducting component is configured to generate an electromagnetic field sufficient to lower the current threshold such that the first current exceeds the lowered current threshold, thereby transitioning the superconducting component to a non-superconducting state.

公开(公告)号：US20200169012A1

公开(公告)日：2020-05-28

申请号：US16664716

申请日：2019-10-25

Applicant: PsiQuantum Corp.

Inventor： Faraz Najafi ,  Qiaodan Jin Stone

IPC: H01R4/68 ,  H01L39/12 ,  H01B12/14 ,  H03K19/195 ,  H01L39/16

Abstract: The various embodiments described herein include methods, devices, and systems for fabricating and operating superconducting circuits. In one aspect, an electric circuit includes: (1) a first superconducting component having a first terminal, a second terminal, and a constriction region between the first terminal and the second terminal; (2) a second superconducting component having a third terminal and a fourth terminal; and (3) a first electrically-insulating component that thermally couples the first superconducting component and the second superconducting component such that heat produced at the constriction region is transferred through the first component to the second superconducting component.

公开(公告)号：US10651325B2

公开(公告)日：2020-05-12

申请号：US16228441

申请日：2018-12-20

Applicant: PsiQuantum Corp.

Inventor： Faraz Najafi ,  Mark Thompson ,  Damien Bonneau ,  Joaquin Matres Abril

IPC: H01L31/0352 ,  H01L31/18 ,  H01L31/0232 ,  H01L31/109 ,  H01L39/24 ,  G01J1/42 ,  H01L39/10 ,  G01J1/44

Abstract: A device includes a first semiconductor layer; a portion of a second semiconductor layer disposed on the first semiconductor layer; and a third semiconductor layer including a first region disposed on the portion of the second semiconductor layer and a second region disposed on the first semiconductor layer. A thickness of the first region is less than a predefined thickness. The device also includes an etch stop layer disposed on the third semiconductor layer; a plurality of distinct portions of a fourth semiconductor layer disposed on the etch stop layer and exposing one or more distinct portions of the etch stop layer over the portion of the second semiconductor layer; and a plurality of distinct portions of a superconducting layer disposed on the plurality of distinct portions of the fourth semiconductor layer and the exposed one or more distinct portions of the etch stop layer.

公开(公告)号：US10586910B2

公开(公告)日：2020-03-10

申请号：US16046807

申请日：2018-07-26

Applicant: PsiQuantum Corp.

Inventor： Faraz Najafi

IPC: H01L39/10 ,  H01L29/43 ,  H01L29/786 ,  H01L31/00 ,  H01L39/22 ,  H01L39/18 ,  G01J1/44 ,  H01L31/0224 ,  H01L31/113 ,  H01L39/16 ,  H01L39/14 ,  G01J1/42

Abstract: The various embodiments described herein include methods, devices, and systems for fabricating and operating transistors. In one aspect, a transistor includes: (1) a semiconducting component configured to operate in an on state at temperatures above a semiconducting threshold temperature; and (2) a superconducting component configured to operate in a superconducting state while: (a) a temperature of the superconducting component is below a superconducting threshold temperature; and (b) a first current supplied to the superconducting component is below a current threshold; where: (i) the semiconducting component is located adjacent to the superconducting component; and (ii) in response to a first input voltage, the semiconducting component is configured to generate an electromagnetic field sufficient to lower the current threshold such that the first current exceeds the lowered current threshold, thereby transitioning the superconducting component to a non-superconducting state.

公开(公告)号：US10461445B2

公开(公告)日：2019-10-29

申请号：US16136124

申请日：2018-09-19

Applicant: PsiQuantum Corp.

Inventor： Faraz Najafi ,  Qiaodan Jin Stone

IPC: H01R4/68 ,  H01B12/14 ,  H01L39/12 ,  H01L39/16 ,  H03K19/195 ,  H01L27/18

Abstract: The various embodiments described herein include methods, devices, and systems for fabricating and operating superconducting circuits. In one aspect, an electric circuit includes: (1) a first superconducting component having a first terminal, a second terminal, and a constriction region between the first terminal and the second terminal; (2) a second superconducting component having a third terminal and a fourth terminal; and (3) a first electrically-insulating component that thermally couples the first superconducting component and the second superconducting component such that heat produced at the constriction region is transferred through the first component to the second superconducting component.

公开(公告)号：US10454014B2

公开(公告)日：2019-10-22

申请号：US16182513

申请日：2018-11-06

Applicant: PSIQUANTUM CORP

Inventor： Faraz Najafi ,  Syrus Ziai

IPC: H01L39/08 ,  H01L39/14 ,  H01L29/861 ,  H01L39/24 ,  H01L39/06

Abstract: An electronic device (e.g., a diode) is provided that includes a substrate and a patterned layer of superconducting material disposed over the substrate. The patterned layer forms a first electrode, a second electrode, and a loop coupling the first electrode with the second electrode by a first channel and a second channel. The first channel and the second channel have different minimum widths. The device further includes a magnet that applies a magnetic field to the loop, which produces an expulsion current in the loop that travels toward the second electrode in the first channel and toward the first electrode in the second channel. For a range of current magnitudes, when the magnetic field is applied to the patterned layer of superconducting material, the conductance from the first electrode to the second electrode is greater than the conductance from the second electrode to the first electrode.

公开(公告)号：US20190109595A1

公开(公告)日：2019-04-11

申请号：US16151180

申请日：2018-10-03

Applicant: PSIQUANTUM Corp.

Inventor： Faraz Najafi

IPC: H03K19/195 ,  H01L39/16

CPC classification number: H03K19/1958 ,  H01L23/552 ,  H01L27/18 ,  H01L31/02027 ,  H01L39/16 ,  H01L39/18 ,  H01L39/225 ,  H03K19/195 ,  H03K19/1954 ,  H03K19/20 ,  H03K19/23

Abstract: The various embodiments described herein include methods, devices, and systems for implementing logic gates. In one aspect, a circuit includes: (1) superconducting components; (2) heat sources, each coupled to a corresponding superconducting component and configured to selectively provide heat to that component; and (3) a current source coupled to the superconducting components and configured to selectively provide: (a) a first current to bias the components such that combination of the first current and heat from any heat source causes the components to transition to a non-superconducting state; and (b) a second current to bias the components such that (i) combination of the second current and heat from each heat source causes the components to transition to the non-superconducting state, and (ii) a combination of the second current and heat from only a subset of the heat sources does not cause the components to transition to the non-superconducting state.