中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

125 records (took 0.02 seconds)

    Semiconductor device
    111.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11631613B2

    公开(公告)日：2023-04-18

    申请号：US17185443

    申请日：2021-02-25

    Applicant: United Microelectronics Corp.

    Inventor： Chih-Kai Hsu ,  Ssu-I Fu ,  Chia-Jung Hsu ,  Chun-Ya Chiu ,  Chin-Hung Chen ,  Yu-Hsiang Lin

    IPC: H01L27/146 ,  H01L21/768 ,  H01L27/108

    Abstract: Provided is a semiconductor device, including a substrate including a pixel region, a gate structure on the substrate in the pixel region, wherein the gate structure comprises a gate dielectric layer and a gate conductive layer on the gate dielectric layer; a dielectric layer located over the substrate and the gate structure; and a contact located in the dielectric layer and electrically connected to the gate conductive layer. The contact includes a doped polysilicon layer in contact with the gate conductive layer; a metal layer located on the doped polysilicon layer, wherein a part of the metal layer is embedded in the doped polysilicon layer; a barrier layer located between the metal layer and the doped polysilicon layer; and a metal silicide layer located between the barrier layer and the doped polysilicon layer.

    High voltage transistor device and method for fabricating the same
    113.
    发明授权
    High voltage transistor device and method for fabricating the same 有权

    公开(公告)号：US11476343B2

    公开(公告)日：2022-10-18

    申请号：US17213868

    申请日：2021-03-26

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Sheng-Yao Huang ,  Yu-Ruei Chen ,  Zen-Jay Tsai ,  Yu-Hsiang Lin

    IPC: H01L21/70 ,  H01L29/423 ,  H01L21/28 ,  H01L29/06

    Abstract: A high-voltage transistor device includes a semiconductor substrate, an isolation structure, a gate dielectric layer, a gate, a source region and a drain region. The semiconductor substrate has a plurality of grooves extending downward from a surface of the semiconductor substrate to form a sawtooth sectional profile. The isolation structure is disposed on the outside of the plurality of grooves, and extends from the surface downwards into the semiconductor substrate to define a high-voltage area. The gate dielectric layer is disposed on the high-voltage area and partially filled in the plurality of grooves. The gate is disposed on the gate dielectric layer. The source region and the drain region are respectively disposed in the semiconductor substrate and isolated from each other.

    MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
    117.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220005957A1

    公开(公告)日：2022-01-06

    申请号：US17476461

    申请日：2021-09-15

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chin-Hung Chen ,  Ssu-I Fu ,  Chih-Kai Hsu ,  Chun-Ya Chiu ,  Chia-Jung Hsu ,  Yu-Hsiang Lin

    IPC: H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L21/306 ,  H01L21/02

    Abstract: A manufacturing method of a semiconductor device includes the following steps. An opening is formed penetrating a dielectric layer on a semiconductor substrate. A stacked structure is formed on the dielectric layer. The stacked structure includes a first semiconductor layer partly formed in the opening and partly formed on the dielectric layer, a sacrificial layer formed on the first semiconductor layer, and a second semiconductor layer formed on the sacrificial layer. A patterning process is performed for forming a fin-shaped structure including the first semiconductor layer, the sacrificial layer, and the second semiconductor layer. An etching process is performed to remove the sacrificial layer in the fin-shaped structure. The first semiconductor layer in the fin-shaped structure is etched to become a first semiconductor wire by the etching process. The second semiconductor layer in the fin-shaped structure is etched to become a second semiconductor wire by the etching process.

    SEMICONDUCTOR DEVICE
    118.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210202308A1

    公开(公告)日：2021-07-01

    申请号：US17185443

    申请日：2021-02-25

    Applicant: United Microelectronics Corp.

    Inventor： Chih-Kai Hsu ,  Ssu-I Fu ,  Chia-Jung Hsu ,  Chun-Ya Chiu ,  Chin-Hung Chen ,  Yu-Hsiang Lin

    IPC: H01L21/768 ,  H01L27/108

    Abstract: Provided is a semiconductor device, including a substrate including a pixel region, a gate structure on the substrate in the pixel region, wherein the gate structure comprises a gate dielectric layer and a gate conductive layer on the gate dielectric layer; a dielectric layer located over the substrate and the gate structure; and a contact located in the dielectric layer and electrically connected to the gate conductive layer. The contact includes a doped polysilicon layer in contact with the gate conductive layer; a metal layer located on the doped polysilicon layer, wherein a part of the metal layer is embedded in the doped polysilicon layer; a barrier layer located between the metal layer and the doped polysilicon layer; and a metal silicide layer located between the barrier layer and the doped polysilicon layer.

Patent Agency Ranking