公开(公告)号：US20140311789A1

公开(公告)日：2014-10-23

申请号：US14080517

申请日：2013-11-14

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Byung Woo HAN ,  Dae Bok OH ,  Jae Yeol CHOI ,  Sang Huk KIM

IPC: H01G2/06 ,  H05K1/18 ,  H01G4/30

CPC classification number: H01G2/06 ,  H01G4/12 ,  H01G4/232 ,  H01G4/30 ,  H05K1/16 ,  H05K1/162 ,  H05K1/18 ,  H05K1/181 ,  H05K1/183 ,  H05K1/185 ,  H05K3/3442 ,  H05K2201/10015 ,  H05K2201/10454 ,  H05K2201/10636 ,  Y02P70/611

Abstract: There is provided a multilayer ceramic electronic component including, a ceramic body including a plurality of dielectric layers stacked in a thickness direction, satisfying T/W>1.0 when a width and a thickness thereof are defined as W and T, respectively, and having a groove portion inwardly recessed in a length direction in at least one main surface thereof, a plurality of first and second internal electrodes disposed in the ceramic body to face each other, having the dielectric layers interposed therebetween, and alternately exposed through both end surfaces of the ceramic body, and first and second external electrodes formed to extend from the both end surfaces of the ceramic body to the at least one main surface having the groove portion formed therein.

Abstract translation: 提供了一种多层陶瓷电子部件，其包括：陶瓷体，其包括在厚度方向上层叠的多个电介质层，其宽度和厚度分别定义为W和T时满足T / W> 1.0，并且具有 在其至少一个主表面中在长度方向上向内凹陷的凹槽部分，布置在陶瓷体中的多个第一和第二内部电极，其彼此面对，具有介于其间的电介质层，并且交替地暴露于 陶瓷体以及形成为从陶瓷体的两端面延伸到形成有槽部的至少一个主面的第一外部电极和第二外部电极。

公开(公告)号：US08802998B2

公开(公告)日：2014-08-12

申请号：US12720745

申请日：2010-03-10

Applicant: Yoshiko Okada ,  Osamu Chikagawa ,  Hidekiyo Takaoka ,  Shodo Takei

Inventor： Yoshiko Okada ,  Osamu Chikagawa ,  Hidekiyo Takaoka ,  Shodo Takei

IPC: H05K1/09 ,  H05K5/00

CPC classification number: H05K3/4629 ,  H01G2/02 ,  H01G4/005 ,  H01G4/30 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2924/01004 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/186 ,  H05K3/4611 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49155

Abstract: A ceramic multilayer substrate incorporating a chip-type ceramic component, in which, even if the chip-type ceramic component is mounted on the surface of the ceramic multilayer substrate, bonding strength between the chip-type ceramic component and an internal conductor or a surface electrode of the ceramic multilayer substrate is greatly improved and increased. The ceramic multilayer substrate includes a ceramic laminate in which a plurality of ceramic layers are stacked, an internal conductor disposed in the ceramic laminate, a surface electrode disposed on the upper surface of the ceramic laminate, and a chip-type ceramic component bonded to the internal conductor or the surface electrode through an external electrode. The internal conductor or the surface electrode is bonded to the external electrode through a connecting electrode, and the connecting electrode forms a solid solution with any of the internal conductor, the surface electrode, and the external electrode.

Abstract translation: 另外，在芯片型陶瓷部件的陶瓷多层基板中，即使在陶瓷多层基板的表面上安装有芯片型陶瓷部件，也可以将芯片型陶瓷部件与内部导体或表面 陶瓷多层基板的电极大大改善和增加。 陶瓷多层基板包括层叠有多个陶瓷层的陶瓷层叠体，设置在陶瓷层叠体中的内部导体，设置在陶瓷层叠体的上表面的表面电极以及与该陶瓷层叠体接合的芯片型陶瓷构件 内部导体或表面电极通过外部电极。 内部导体或表面电极通过连接电极接合到外部电极，连接电极与内部导体，表面电极和外部电极中的任一个形成固溶体。

公开(公告)号：US08797712B2

公开(公告)日：2014-08-05

申请号：US13534000

申请日：2012-06-27

Applicant: Hideki Otsuka ,  Kazuhiro Yoshida

Inventor： Hideki Otsuka ,  Kazuhiro Yoshida

IPC: H01G4/228 ,  H01G4/06

CPC classification number: H01G2/06 ,  H01G4/228 ,  H01G4/232 ,  H01G4/30 ,  H05K3/3426 ,  H05K2201/10636 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613

Abstract: In a ceramic capacitor, first and second electrode terminals each include a bonded-to-substrate portion, a first bonded-to-electrode portion bonded to a first edge of one of first and second external electrodes, a second bonded-to-electrode portion bonded to a second edge of the one of first and second external electrodes and disposed at a distance from the first bonded-to-electrode portion in the first directions, and a connecting portion connecting the first and second bonded-to-electrode portions and the bonded-to-substrate portion. W1/W0 is about 0.3 or more, and h/L is about 0.1 or more.

Abstract translation: 在陶瓷电容器中，第一和第二电极端子各自包括接合到衬底部分，第一接合电极部分接合到第一和第二外部电极之一的第一边缘，第二接合电极部分 接合到第一外部电极和第二外部电极中的一个的第二边缘并且在第一方向上与第一接合电极部分设置一定距离，以及连接第一和第二接合电极部分和第二接合电极部分的连接部分， 键合到衬底部分。 W1 / W0为约0.3以上，h / L约为0.1以上。

公开(公告)号：US20140202743A1

公开(公告)日：2014-07-24

申请号：US14125238

申请日：2012-06-11

Applicant: Dong Wan Kim ,  Tae Ho Kim ,  Il Sang Maeng ,  Song Hee Cho

Inventor： Dong Wan Kim ,  Tae Ho Kim ,  Il Sang Maeng ,  Song Hee Cho

IPC: H05K1/02

CPC classification number: H05K1/028 ,  H05K1/188 ,  H05K3/4652 ,  H05K3/4691 ,  H05K2201/10636 ,  H05K2203/063 ,  Y02P70/611

Abstract: Disclosed are a printed circuit board and a method for manufacturing the same. The printed circuit board includes a flexible substrate divided into first, second, and third regions, a first rigid substrate in the first region of the flexible substrate, and a second rigid substrate in the third region of the flexible substrate. The first and second substrates expose the second region of the flexible substrate.

Abstract translation: 公开了一种印刷电路板及其制造方法。 印刷电路板包括分为第一，第二和第三区域的柔性基板，柔性基板的第一区域中的第一刚性基板和柔性基板的第三区域中的第二刚性基板。 第一和第二基板暴露柔性基板的第二区域。

公开(公告)号：US20140183722A1

公开(公告)日：2014-07-03

申请号：US14122452

申请日：2012-12-21

Applicant: Panasonic Corporation

Inventor： Ryosuke Shiozaki ,  Suguru Fujita ,  Shunsuke Hirano

IPC: H01L23/28 ,  H01L21/56

CPC classification number: H01L23/28 ,  H01L21/56 ,  H01L21/563 ,  H01L23/053 ,  H01L23/13 ,  H01L23/36 ,  H01L23/42 ,  H01L23/49805 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/1532 ,  H01L2924/19105 ,  H05K1/141 ,  H05K1/18 ,  H05K2201/042 ,  H05K2201/10636 ,  H05K2201/2036 ,  Y02P70/611 ,  H01L2924/00012

Abstract: This semiconductor device, which has electronic components provided in a cavity of a module having a cavity structure, can be prevented from being increased in size. In the device, the module having the cavity structure is provided with a plurality of components, for instance, an IC (3) and chip components (6a, 6b), on one surface facing a motherboard (9), said one surface being on the cavity side. The motherboard (9) is provided with the chip components (6c, 6d) on parts of one surface facing the module having the cavity structure, said parts not having the components provided on the module surface having the components provided thereon.

Abstract translation: 可以防止具有设置在具有空腔结构的模块的空腔中的电子部件的该半导体装置的尺寸增大。 在该装置中，具有空腔结构的模块在面对主板（9）的一个表面上设置有多个部件，例如IC（3）和芯片部件（6a，6b），所述一个表面处于 空腔侧。 主板（9）在面向具有空腔结构的模块的一个表面的部分上设置有芯片部件（6c，6d），所述部件没有设置在模块表面上的具有设置在其上的部件的部件。

公开(公告)号：US20140182917A1

公开(公告)日：2014-07-03

申请号：US14141800

申请日：2013-12-27

Applicant: IBIDEN CO., LTD.

Inventor： Yukinobu MIKADO ,  Yuki Tanaka

IPC: B23K26/38 ,  H05K1/11 ,  H05K3/00

CPC classification number: B23K26/383 ,  B23K26/08 ,  B23K26/384 ,  B23K26/386 ,  B23K26/389 ,  H05K1/185 ,  H05K3/0032 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/10636 ,  H05K2203/107 ,  Y02P70/611 ,  Y10T29/49135

Abstract: A method for forming cavity in substrate includes setting start position on closed loop line having circumference L for substrate, consecutively irradiating laser from laser device upon board for the substrate such that holes are formed, and moving the device in loop from the start position along the line such that penetrating hole is formed through the board. The start position of first loop is set as base position, the moving includes shifting the start position by distance d after each loop and controlling such that the moving satisfies p=Σdi, m≅L/p and M=m×n, where i=1 to n, n represents number of loops, p represents pitch of the holes, m represents number of the holes in loop, Σdi is distance from the base position for the start position after i-th loop, and M is number of the holes by the loops.

Abstract translation: 在衬底中形成空腔的方法包括：在具有用于衬底的圆周L的闭环线上设置开始位置，从基板上的激光装置连续照射激光，使得形成孔，并且沿着沿着衬底的起始位置循环移动装置 使得穿过该板形成穿透孔。 将第一循环的起始位置设定为基准位置，移动包括在每个回路之后移动开始位置距离d，并且控制使移动满足p =＆Sgr; di，m≅L/ p和M = m×n， 其中i = 1至n，n表示环数，p表示孔的间距，m表示环中的孔数，＆lt; di是与第i个回路之后的起始位置的基准位置的距离，M 是环的数目。

公开(公告)号：US20140153205A1

公开(公告)日：2014-06-05

申请号：US14175128

申请日：2014-02-07

Applicant: IBIDEN CO., LTD.

Inventor： Yukinobu MIKADO ,  Mitsuhiro Tomikawa ,  Yusuke Tanaka ,  Toshiki Furutani

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/185 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2924/12042 ,  H01L2924/15153 ,  H05K3/306 ,  H05K3/4602 ,  H05K2201/10015 ,  H05K2201/1003 ,  H05K2201/10636 ,  H05K2203/1469 ,  Y02P70/611 ,  Y10T29/49124 ,  Y10T29/49139 ,  H01L2924/00

Abstract: A wiring board includes a substrate having an opening portion, multiple electronic devices positioned in the opening portion such that the electronic devices are arrayed in the lateral direction of each of the electronic devices, and an insulation layer formed on the substrate such that the insulation layer covers the electronic devices in the opening portion of the substrate. The substrate has a wall surface defining the opening portion and formed such that the opening portion is partially partitioned and the electronic devices are kept from making contact with each other.

Abstract translation: 布线板包括具有开口部分的基板，位于开口部分中的多个电子装置，使得电子装置沿每个电子装置的横向方向排列;以及绝缘层，其形成在基板上，使得绝缘层 覆盖基板的开口部分中的电子器件。 衬底具有限定开口部分的壁表面，并且形成为使得开口部分被部分分隔并且电子器件保持彼此接触。

公开(公告)号：US08743554B2

公开(公告)日：2014-06-03

申请号：US12655834

申请日：2010-01-08

Applicant: James V. Russell

Inventor： James V. Russell

IPC: H05K1/18

CPC classification number: H05K1/185 ,  H05K1/023 ,  H05K1/0231 ,  H05K1/0234 ,  H05K3/4046 ,  H05K2201/096 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49146 ,  Y10T29/53174

Abstract: Embedding a power modification component such as a capacitance inside of an adaptor board located to extend over and beyond the vias of the main circuit board so that a portion of the interposer board containing the embedded capacitance is located beyond where the vias or blinds are located. This permits that via to conduct through the opening. In this way, the capacitance and the resistance will have a closer contact point to the electrical component. A resistance can also be embedded in an opening in the adaptor board and be vertically aligned within the opening to make contact with a pad on top of the adaptor board and a pad at the bottom of the adaptor board so that electricity conducts through the embedded component.

Abstract translation: 将诸如电容内部的功率改进组件嵌入到位于主电路板的通孔之上延伸超过主电路板的通孔的电容器内，使得包含嵌入电容的插入板的部分位于通孔或百叶窗所在的位置之外。 这允许via通过开放。 以这种方式，电容和电阻将具有与电气部件更接近的接触点。 电阻也可以嵌入到适配器板的开口中并且在开口内垂直对准以与适配器板的顶部上的焊盘接触并且在适配器板的底部具有焊盘，使得电通过嵌入部件 。

公开(公告)号：US20140138137A1

公开(公告)日：2014-05-22

申请号：US13785914

申请日：2013-03-05

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Joon Hwan KWAG

IPC: H01G4/30

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G4/232 ,  H05K3/3436 ,  H05K3/3442 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611

Abstract: There is provided an array type multilayer ceramic electronic component, including: a ceramic element having a plurality of dielectric layers laminated therein; first and second external electrodes spaced apart from each other in a length direction on one surface and the other surface opposing the one surface of the ceramic element; and a plurality of internal electrode laminated parts including a plurality of first and second internal electrodes opposing each other within the ceramic element and connected to the first and second external electrodes, wherein a portion of the internal electrode laminated parts is different from other internal electrode laminated parts thereof in terms of the number of laminations of the first and second internal electrodes.

Abstract translation: 提供了一种阵列型多层陶瓷电子部件，其包括：陶瓷元件，其中层叠有多个电介质层; 第一外部电极和第二外部电极在一个表面上沿长度方向彼此分开，另一个表面与陶瓷元件的一个表面相对; 以及多个内部电极层叠部分，其包括在所述陶瓷元件内彼此相对的多个第一和第二内部电极，并且连接到所述第一和第二外部电极，其中所述内部电极层叠部分的一部分与其他内部电极层压不同 就其第一和第二内部电极的叠片数而言的部分。

公开(公告)号：US20140116768A1

公开(公告)日：2014-05-01

申请号：US14147795

申请日：2014-01-06

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kazuo HATTORI ,  Isamu FUJIMOTO

IPC: H05K1/18

CPC classification number: H05K1/181 ,  H01G2/065 ,  H01G4/228 ,  H05K3/3442 ,  H05K2201/049 ,  H05K2201/09181 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: An electronic component includes an interposer, and a multilayer ceramic capacitor. The interposer includes a substrate including front and back surfaces that are parallel or substantially parallel to each other. Two first mounting electrodes and two second mounting electrodes are located on the front surface of the substrate, on opposite end portions in the longitudinal direction. Recesses are located in the longitudinal side surface of the insulating substrate. Connecting conductors are each provided in the side wall surface of each of the recesses. The connecting conductors connect a first external connection electrode and a second external connection electrode that are located on the back surface of the substrate, and first mounting electrodes and second mounting electrodes.

Abstract translation: 电子部件包括插入件和多层陶瓷电容器。 插入器包括包括彼此平行或基本平行的前表面和后表面的基板。 两个第一安装电极和两个第二安装电极位于基板的前表面上，在纵向上的相对端部上。 凹部位于绝缘基板的纵向侧面。 连接导体各自设置在每个凹部的侧壁表面中。 连接导体连接位于基板的背面的第一外部连接电极和第二外部连接电极以及第一安装电极和第二安装电极。