公开(公告)号：US20160225739A1

公开(公告)日：2016-08-04

申请号：US15096588

申请日：2016-04-12

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Reynaldo Co ,  Rizza Lee Saga Cizek ,  Wael Zohni

IPC: H01L23/00 ,  B23K20/00 ,  H01L21/56

CPC classification number: H01L24/85 ,  B23K20/004 ,  B23K20/005 ,  B23K20/007 ,  H01L21/4853 ,  H01L21/56 ,  H01L23/49811 ,  H01L24/43 ,  H01L24/78 ,  H01L2224/04105 ,  H01L2224/056 ,  H01L2224/432 ,  H01L2224/4382 ,  H01L2224/43985 ,  H01L2224/783 ,  H01L2224/78301 ,  H01L2224/7855 ,  H01L2224/78621 ,  H01L2224/78822 ,  H01L2224/85 ,  H01L2224/85345 ,  H01L2224/85399 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/2064 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: An electrically conductive lead is formed using a bonding tool. After bonding the wire to a metal surface and extending a length of the wire beyond the bonding tool, the wire is clamped. Movement of the bonding tool imparts a kink to the wire at a location where the wire is fully separated from any metal element other than the bonding tool. A forming element, e.g., an edge or a blade skirt provided at an exterior surface of the bonding tool can help kink the wire. Optionally, twisting the wire while tensioning the wire using the bonding tool can cause the wire to break and define an end. The lead then extends from the metal surface to the end, and may exhibit a sign of the torsional force applied thereto.

Abstract translation: 使用接合工具形成导电引线。 在将金属丝接合到金属表面上并将一段长度的金属丝延伸超过粘合工具之后，线被夹紧。 焊接工具的移动在电线与除了焊接工具之外的任何金属元件完全分离的位置处对电线施加扭结。 形成元件，例如设置在接合工具的外表面处的边缘或叶片裙部可以帮助扭结线。 可选地，在使用接合工具张紧线的同时扭转线可能导致线断裂并限定端部。 引线然后从金属表面延伸到末端，并且可能表现出施加到其上的扭转力的迹象。

公开(公告)号：US09377824B2

公开(公告)日：2016-06-28

申请号：US14244007

申请日：2014-04-03

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Frank Lambrecht

IPC: G06F1/18 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L25/10 ,  H01L23/00 ,  H01L23/36 ,  H01L23/48 ,  H01L23/525 ,  H01L21/56 ,  H01L23/50 ,  H05K1/02 ,  H05K1/18

CPC classification number: H01L25/0657 ,  G06F1/18 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/3672 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/525 ,  H01L23/5385 ,  H01L24/24 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/3011 ,  H05K1/0243 ,  H05K1/181 ,  H05K2201/10159 ,  H05K2201/10545 ,  H05K2201/10734 ,  Y02P70/611

Abstract: A microelectronic assembly (300) or system (1500) includes at least one microelectronic package (100) having a microelectronic element (130) mounted face up above a first surface (108) of a substrate (102), one or more columns (138, 140) of contacts (132) extending in a first direction (142) along the microelectronic element front face. Columns (104A, 105B, 107A, 107B) of terminals (105 107) exposed at a second surface (110) of the substrate extend in the first direction. First terminals (105) exposed at surface (110) in a central region (112) thereof having width (152) not more than three and one-half times a minimum pitch (150) of the columns of terminals can be configured to carry address information usable to determine an addressable memory location. An axial plane of the microelectronic element can intersect the central region.

Abstract translation: 微电子组件（300）或系统（1500）包括至少一个微电子封装（100），所述微电子封装（100）具有面向上安装在衬底（102）的第一表面（108）上方的微电子元件（130），一个或多个柱 ，140）沿着所述微电子元件正面在第一方向（142）延伸的触点（132）。 在基板的第二表面（110）处露出的端子（1057a）的列（104A，105B，107A，107B）沿第一方向延伸。 具有宽度（152）不大于终端列的最小间距（150）的三分之一倍的中心区域（112）的表面（110）处的第一端子（105）可被配置为承载地址 用于确定可寻址存储器位置的信息。 微电子元件的轴向平面可以与中心区域相交。

公开(公告)号：US09241420B2

公开(公告)日：2016-01-19

申请号：US14275098

申请日：2014-05-12

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba ,  Yong Chen

IPC: H01L23/48 ,  H01L23/34 ,  H01L21/70 ,  H05K7/14 ,  H01L23/13 ,  H01L25/065 ,  G11C5/06 ,  H01L23/498 ,  H01L23/31

CPC classification number: H05K7/1459 ,  G11C5/063 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L25/0655 ,  H01L2224/4824 ,  H01L2924/15311

Abstract: In-package fly-by signaling can be provided in a multi-chip microelectronic package having address lines on a package substrate configured to carry address information to a first connection region on the substrate having a first delay from terminals of the package, and the address lines being configured to carry the address information beyond the first connection region to at least to a second connection region having a second delay from the terminals that is greater than the first delay. Address inputs of a first microelectronic element, e.g., semiconductor chip, can be coupled with each of the address lines at the first connection region, and address inputs of a second microelectronic element can be coupled with each of the address lines at the second connection region.

Abstract translation: 可以在具有在封装衬底上的地址线的多芯片微电子封装中提供封装内的飞越信号，该封装衬底被配置为将地址信息传送到具有来自封装端子的第一延迟的衬底上的第一连接区域，并且地址 线路被配置为将地址信息超出第一连接区域至少至少具有来自大于第一延迟的端子的具有第二延迟的第二连接区域。 第一微电子元件（例如，半导体芯片）的地址输入可以与第一连接区域处的每个地址线耦合，并且第二微电子元件的地址输入可以在第二连接区域与每个地址线耦合 。

公开(公告)号：US20150371968A1

公开(公告)日：2015-12-24

申请号：US14837561

申请日：2015-08-27

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Richard Dewitt Crisp ,  Wael Zohni ,  Ilyas Mohammed

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/5386 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/525 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A chip package has multiple chips that may be arranged side-by-side or in a staggered, stair step arrangement. The contacts of the chips are connected to interconnect pads carried on the chips themselves or on a redistribution substrate. The interconnect pads desirably are arranged in a relatively narrow interconnect zone, such that the interconnect pads can be readily wire-bonded or otherwise connected to a package substrate.

Abstract translation: 芯片封装具有多个芯片，可以并排布置或以交错的台阶布置布置。 芯片的触点连接到芯片本身或再分布基板上承载的互连焊盘。 互连焊盘理想地布置在相对窄的互连区域中，使得互连焊盘可以容易地线接合或以其他方式连接到封装衬底。

公开(公告)号：US09219050B2

公开(公告)日：2015-12-22

申请号：US14669540

申请日：2015-03-26

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba

IPC: H01L23/00 ,  H01L25/065

CPC classification number: H01L24/49 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/02375 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/0901 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48228 ,  H01L2224/4824 ,  H01L2224/49052 ,  H01L2224/4912 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A semiconductor unit includes a chip having left and right columns of contacts at its front surface. Interconnect pads are provided overlying the front surface of the chip and connected to at least some of the contacts as, for example, by traces or by arrangements including wire bonds. The interconnect pads alone, or the interconnect pads and some of the contacts, provide an array of external connection elements. This array includes some reversal pairs of external connection elements in which the external connection element connected to or incorporating the right contact is disposed to the left of the external connection element incorporating or connected to the left contact. Such a unit may be used in a multi-chip package such as a two-chip package having a first chip facing upwardly and a second chip facing downwardly towards a package substrate, disposed below the chips. The reversed connections simplify routing, particularly where corresponding contacts of the two chips are to be connected to common terminals on the package substrate.

Abstract translation: 半导体单元包括在其前表面具有左列和右列触点的芯片。 互连焊盘被提供在芯片的前表面上并且连接到至少一些触点，例如通过迹线或包括引线键合的布置。 单独的互连焊盘或互连焊盘和一些触点提供外部连接元件的阵列。 该阵列包括一些外部连接元件的反转对，其中连接到或结合右触点的外部连接元件设置在并入或连接到左触点的外部连接元件的左侧。 这种单元可以用在多芯片封装中，例如设置在芯片下方的具有面向上的第一芯片的双芯片封装和朝向封装基板的向下的第二芯片。 反向连接简化了路由，特别是在两个芯片的相应触点连接到封装基板上的公共端子的情况下。

公开(公告)号：US20150364450A1

公开(公告)日：2015-12-17

申请号：US14837576

申请日：2015-08-27

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Belgacem Haba ,  Wael Zohni

IPC: H01L25/065 ,  H01L23/50 ,  H01L23/12

CPC classification number: H01L25/0657 ,  H01L23/12 ,  H01L23/13 ,  H01L23/50 ,  H01L24/06 ,  H01L24/09 ,  H01L2224/023 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/09151 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/01322 ,  H01L2924/14361 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0248 ,  H05K1/112 ,  H05K1/181 ,  H05K3/3415 ,  H05K2201/10159 ,  Y02P70/611 ,  H01L2924/00

Abstract: A microelectronic package has a dielectric element with first and second parallel apertures. A first microelectronic element has contacts overlying the first aperture, and a second microelectronic element has contacts overlying the second aperture. The second microelectronic element can overlie a rear face of the first microelectronic element and the same surface of the dielectric element as the first microelectronic element. First terminals on a second surface of the dielectric element between said first and second apertures can be configured to carry all data signals for read and write access to memory locations within the first and second microelectronic elements.

Abstract translation: 微电子封装具有带有第一和第二平行孔的电介质元件。 第一微电子元件具有覆盖第一孔的触点，并且第二微电子元件具有覆盖第二孔的触点。 第二微电子元件可以覆盖第一微电子元件的后表面和与第一微电子元件相同的介质元件的表面。 位于所述第一和第二孔之间的电介质元件的第二表面上的第一端子可被配置为承载用于对第一和第二微电子元件内的存储器位置的读取和写入访问的所有数据信号。

公开(公告)号：US09082753B2

公开(公告)日：2015-07-14

申请号：US14297701

申请日：2014-06-06

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Reynaldo Co ,  Rizza Lee Saga Cizek ,  Wael Zohni

IPC: B23K31/02 ,  H01L21/44 ,  H01L23/00 ,  B23K20/00 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L24/85 ,  B23K20/004 ,  B23K20/005 ,  B23K20/007 ,  H01L21/4853 ,  H01L21/56 ,  H01L23/49811 ,  H01L24/43 ,  H01L24/78 ,  H01L2224/04105 ,  H01L2224/056 ,  H01L2224/432 ,  H01L2224/4382 ,  H01L2224/43985 ,  H01L2224/783 ,  H01L2224/78301 ,  H01L2224/7855 ,  H01L2224/78621 ,  H01L2224/78822 ,  H01L2224/85 ,  H01L2224/85345 ,  H01L2224/85399 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/2064 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: An electrically conductive lead is formed using a bonding tool. After bonding the wire to a metal surface and extending a length of the wire beyond the bonding tool, the wire is clamped. Movement of the bonding tool imparts a kink to the wire at a location where the wire is fully separated from any metal element other than the bonding tool. A forming element, e.g., an edge or a blade skirt provided at an exterior surface of the bonding tool can help kink the wire. Twisting the wire while tensioning the wire using the bonding tool can cause the wire to break and define an end. The lead then extends from the metal surface to the end, and may exhibits a sign of the torsional force applied thereto.

Abstract translation: 使用接合工具形成导电引线。 在将金属丝接合到金属表面上并将一段长度的金属丝延伸超过粘合工具之后，线被夹紧。 焊接工具的移动在电线与除了焊接工具之外的任何金属元件完全分离的位置处对电线施加扭结。 形成元件，例如设置在接合工具的外表面处的边缘或叶片裙部可以帮助扭结线。 使用接合工具拉紧电线时扭绞线会导致电线断裂并限定端部。 引线然后从金属表面延伸到末端，并且可以表现出施加到其上的扭转力的标志。

公开(公告)号：US20150129646A1

公开(公告)日：2015-05-14

申请号：US14077597

申请日：2013-11-12

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Reynaldo Co ,  Rizza Lee Saga Cizek ,  Wael Zohni

IPC: H01L23/00

CPC classification number: H01L24/43 ,  B23K20/004 ,  B23K20/005 ,  B23K20/007 ,  B23K2101/42 ,  H01L21/4885 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/48 ,  H01L24/85 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/432 ,  H01L2224/4382 ,  H01L2224/43985 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/78301 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: An electrically conductive lead is formed using a bonding tool. After bonding the wire to a metal surface and extending a length of the wire beyond the bonding tool, the wire is clamped. Movement of the bonding tool imparts a kink to the wire at a location where the wire is fully separated from any metal element other than the bonding tool. A forming element, e.g., an edge or a blade skirt provided at an exterior surface of the bonding tool can help kink the wire. Tensioning the wire using the bonding tool causes the wire to break and define an end. The lead then extends from the metal surface to the end.

Abstract translation: 使用接合工具形成导电引线。 在将金属丝接合到金属表面上并将一段长度的金属丝延伸超过粘合工具之后，线被夹紧。 焊接工具的移动在线材与除了焊接工具之外的任何金属元件完全分离的位置处对线材施加扭结。 形成元件，例如设置在接合工具的外表面处的边缘或叶片裙部可以帮助扭结线。 使用接合工具拉紧电线会使电线断裂并确定端部。 然后，引线从金属表面延伸到末端。

公开(公告)号：US20150091194A1

公开(公告)日：2015-04-02

申请号：US14563240

申请日：2014-12-08

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Wael Zohni

IPC: H01L25/065

CPC classification number: H01L25/0652 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3185 ,  H01L23/3736 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/50 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/07 ,  H01L2224/04042 ,  H01L2224/06156 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/50 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/18165 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A microelectronic package can include a substrate having first and second opposed surfaces extending in first and second transverse directions and an opening extending between the first and second surfaces and defining first and second distinct parts each elongated along a common axis extending in the first direction, first and second microelectronic elements each having a front surface facing the first surface of the substrate and a column of contacts at the respective front surface, a plurality of terminals exposed at the second surface, and first and second electrical connections aligned with the respective first and second parts of the opening and extending from at least some of the contacts of the respective first and second microelectronic elements to at least some of the terminals. The column of contacts of the first and second microelectronic elements can be aligned with the respective first and second parts of the opening.

Abstract translation: 微电子封装可以包括具有在第一和第二横向方向上延伸的第一和第二相对表面的基板和在第一和第二表面之间延伸的开口，并且限定第一和第二不同部分，每个沿着沿着第一方向延伸的共同轴线延伸， 以及第二微电子元件，每个具有面向衬底的第一表面的前表面和在相应的前表面处的接触柱，在第二表面处暴露的多个端子以及与相应的第一和第二表面对准的第一和第二电连接 开口的部分并且从相应的第一和第二微电子元件的至少一些触点延伸到至少一些端子。 第一和第二微电子元件的接触柱可以与开口的相应的第一和第二部分对准。

公开(公告)号：US08945987B2

公开(公告)日：2015-02-03

申请号：US13837724

申请日：2013-03-15

Applicant: Invensas Corporation

Inventor： Richard Dewitt Crisp ,  Wael Zohni ,  Belgacem Haba

IPC: H01L23/02 ,  H01L23/52 ,  H01L25/00

CPC classification number: H01L25/50 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49861 ,  H01L24/50 ,  H01L25/0655 ,  H01L25/0657 ,  H01L27/14683 ,  H01L2224/04042 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/92147 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/15311 ,  H01L2924/00

Abstract: In a high volume method for manufacturing a microelectronic package, a spacer element and a first die, i.e., microelectronic element, can be attached face-down to a surface of a substrate, contacts on the first die facing a first through opening of the substrate. Then, a second die can be attached face-down atop the first die and the spacer element, contacts on the second die disposed beyond an edge of the first die and facing a second through opening in the substrate. Electrical connections can then be formed between each of the first and second dies and the substrate. The first and second dies can be transferred from positions of a single diced wafer which are selected to maximize compound speed bin yield of the microelectronic package.

Abstract translation: 在用于制造微电子封装的高体积方法中，间隔元件和第一裸片（即微电子元件）可以面朝下地附着到衬底的表面，在第一裸片上的与衬底的第一通孔相接触 。 然后，可以将第二模具面朝下地安装在第一模具和间隔元件的顶部上，在第二模具上接触设置在第一模具的边缘之外并且面向衬底中的第二通孔。 然后可以在第一和第二模具和基板中的每一个之间形成电连接。 第一和第二模具可以从单个切割晶片的位置转移，其被选择为使微电子封装的复合速度仓产量最大化。