Self-aligned nano-scale device with parallel plate electrodes
    131.
    发明授权
    Self-aligned nano-scale device with parallel plate electrodes 失效
    具有平行平板电极的自对准纳米级装置

    公开(公告)号:US08476530B2

    公开(公告)日:2013-07-02

    申请号:US12488948

    申请日:2009-06-22

    CPC classification number: B81C1/00698 B81B2201/0292

    Abstract: A contiguous deep trench includes a first trench portion having a constant width between a pair of first parallel sidewalls, second and third trench portions each having a greater width than the first trench portion and laterally connected to the first trench portion. A non-conformal deposition process is employed to form a conductive layer that has a tapered geometry within the contiguous deep trench portion such that the conductive layer is not present on bottom surfaces of the contiguous deep trench. A gap fill layer is formed to plug the space in the first trench portion. The conductive layer is patterned into two conductive plates each having a tapered vertical portion within the first trench portion. After removing remaining portions of the gap fill layer, a device is formed that has a small separation distance between the tapered vertical portions of the conductive plates.

    Abstract translation: 连续的深沟槽包括在一对第一平行侧壁之间具有恒定宽度的第一沟槽部分,第二沟槽部分和第三沟槽部分各自具有比第一沟槽部分更大的宽度并横向连接到第一沟槽部分。 使用非共形沉积工艺来形成导电层,该导电层在邻接的深沟槽部分内具有锥形几何形状,使得导电层不存在于邻接的深沟槽的底表面上。 形成间隙填充层以堵塞第一沟槽部分中的空间。 将导电层图案化为在第一沟槽部分内具有锥形垂直部分的两个导电板。 在去除间隙填充层的剩余部分之后,形成在导电板的锥形垂直部分之间具有小间隔距离的装置。

    Acoustic device with low acoustic loss packaging
    132.
    发明授权
    Acoustic device with low acoustic loss packaging 有权
    具有低声损耗包装的声学装置

    公开(公告)号:US08193597B2

    公开(公告)日:2012-06-05

    申请号:US12619963

    申请日:2009-11-17

    Abstract: A device includes: a substrate having an aperture therethrough from a first side of the substrate to a second side of the substrate; a semiconductor die having an acoustic transducer, the semiconductor die being provided on the first side of the substrate such that the acoustic transducer is aligned with the aperture in the substrate; and a dual in-line package having a recess formed therein. The substrate is disposed such that the first side of the substrate faces the recess of the dual in-line package, and the semiconductor die is disposed between the first side of the substrate and the bottom surface of the recess in the dual in-line package.

    Abstract translation: 一种器件包括:衬底,其具有从衬底的第一侧到衬底的第二侧的穿过的孔; 具有声换能器的半导体管芯,所述半导体管芯设置在所述衬底的第一侧上,使得所述声换能器与所述衬底中的孔对准; 以及其中形成有凹部的双列直插式封装。 衬底被布置成使得衬底的第一侧面对双列直插式封装的凹部,并且半导体管芯设置在衬底的第一侧和凹陷的底表面之间的双列直插封装 。

    Micromechanical sensor, sensor array and method
    133.
    发明授权
    Micromechanical sensor, sensor array and method 有权
    微机械传感器,传感器阵列及方法

    公开(公告)号:US08136403B2

    公开(公告)日:2012-03-20

    申请号:US11988417

    申请日:2006-07-04

    Abstract: The present invention relates to a micromechanical sensor for analyzing liquid samples and an array of such sensors. The invention also concerns a method for sensing liquid samples and the use of longitudinal bulk acoustic waves for analyzing liquid phase samples micromechanically. The sensor comprises a body and a planar wave guide portion spaced from the body. At least one electro-mechanical transducer element are used for excitation of longitudinal bulk acoustic waves to the wave guide portion in response to electrical actuation and for converting acoustic waves into electrical signals. The wave guide portion is provided with a sample-receiving zone onto which the sample can be introduced. By means of the invention, the sensitivity of micromechanical liquid sensors can be improved.

    Abstract translation: 本发明涉及用于分析液体样品的微机械传感器和这种传感器的阵列。 本发明还涉及用于感测液体样品的方法和使用纵向体声波来微机械地分析液相样品。 传感器包括主体和与主体间隔开的平面波导部分。 至少一个机电换能器元件用于响应于电致动并将声波转换成电信号而将纵向体声波激发到波导部分。 波导部分设置有可以将样品引入其上的样本接收区域。 通过本发明,可提高微机械液体传感器的灵敏度。

    MICRO DEVICE PACKAGING
    134.
    发明申请
    MICRO DEVICE PACKAGING 审中-公开
    微型设备包装

    公开(公告)号:US20120012963A1

    公开(公告)日:2012-01-19

    申请号:US13145493

    申请日:2009-02-27

    Abstract: In one embodiment, a method for making an optical micro device package includes: providing a substrate wafer having a plurality of solid state light sensors integrate therein; providing a transparent cover wafer coated with a material that alters the transparency characteristics of the cover wafer; forming a layer of light sensitive, photo definable adhesive material on the substrate wafer; selectively removing part of the layer of adhesive material in a pattern for a plurality of adhesive spacers between the substrate wafer and the cover wafer with each spacer surrounding a corresponding one of the light sensors; bonding the substrate wafer and the cover wafer together at the spacers to form a wafer assembly in which each spacer surrounds and seals a corresponding one of the light sensors within a cavity bounded by a spacer and the two wafers; and singulating individual device packages from the wafer assembly.

    Abstract translation: 在一个实施例中,一种用于制造光学微器件封装的方法包括:提供具有集成在其中的多个固态光传感器的衬底晶片; 提供涂覆有改变覆盖晶片的透明特性的材料的透明盖晶片; 在衬底晶片上形成一层光敏的可光定义粘合剂材料; 在衬底晶片和覆盖晶片之间的多个粘合剂间隔物的图案中选择性地去除粘合剂材料层的一部分,每个间隔物环绕相应的一个光传感器; 将衬底晶片和覆盖晶片在间隔件处结合在一起以形成晶片组件,其中每个间隔件在由间隔件和两个晶片限定的空腔内围绕并密封相应的一个光传感器; 以及从晶片组件分离单个器件封装。

    Method and structures for etching cavity in silicon under dielectric membrane
    136.
    发明申请
    Method and structures for etching cavity in silicon under dielectric membrane 有权
    介电膜下硅蚀刻腔体的方法和结构

    公开(公告)号:US20100327393A1

    公开(公告)日:2010-12-30

    申请号:US12456910

    申请日:2009-06-24

    Abstract: A semiconductor device includes a semiconductor layer (2) and a dielectric stack (3) on the semiconductor layer. A plurality of etchant openings (24-1,2 . . . ) are formed through the dielectric stack (3) for passage of etchant for etching a plurality of overlapping sub-cavities (4-1,2 . . . ), respectively. The etchant is introduced through the etchant openings to etch a composite cavity (4) in the semiconductor layer by simultaneously etching the plurality of overlapping sub-cavities into the semiconductor layer.

    Abstract translation: 半导体器件包括在半导体层上的半导体层(2)和电介质叠层(3)。 多个蚀刻剂开口(24-1,2 ...)通过电介质叠层(3)形成,用于通过蚀刻剂,分别蚀刻多个重叠的子腔(4-1,2 ...)。 通过蚀刻剂开口引入蚀刻剂,以通过同时将多个重叠子腔同时蚀刻到半导体层中来蚀刻半导体层中的复合空腔(4)。

    CMOS-Compatible Microstructures and Methods of Fabrication
    137.
    发明申请
    CMOS-Compatible Microstructures and Methods of Fabrication 失效
    CMOS兼容微结构和制作方法

    公开(公告)号:US20100044807A1

    公开(公告)日:2010-02-25

    申请号:US12422280

    申请日:2009-04-12

    Applicant: Long-Sheng Fan

    Inventor: Long-Sheng Fan

    Abstract: The present invention addresses the aims and issues of making multi layer microstructures including “metal-shell-oxide-core” structures and “oxide-shell-metal-core” structures, and mechanically constrained structures and the constraining structures using CMOS (complimentary metal-oxide-semiconductor transistors) materials and layers processed during the standard CMOS process and later released into constrained and constraining structures by etching away those CMOS materials used as sacrificial materials. The combinations of possible constrained structures and methods of fabrication are described.

    Abstract translation: 本发明解决了制造多层微观结构的目的和问题,包括“金属 - 壳 - 氧化物 - 氧化物 - 核心”结构和“氧化物 - 壳 - 金属 - 芯”结构,机械约束结构和使用CMOS(互补金属 - 氧化物半导体晶体管)在标准CMOS工艺期间处理的材料和层,然后通过蚀刻掉用作牺牲材料的那些CMOS材料而释放到约束和约束结构中。 描述了可能的约束结构和制造方法的组合。

    INTEGRATED CAPACITIVE MICROFLUIDIC SENSORS METHOD AND APPARATUS
    139.
    发明申请
    INTEGRATED CAPACITIVE MICROFLUIDIC SENSORS METHOD AND APPARATUS 有权
    集成电容式微流体传感器方法和装置

    公开(公告)号:US20080171134A1

    公开(公告)日:2008-07-17

    申请号:US11830581

    申请日:2007-07-30

    Abstract: A microfluidic device and method for capacitive sensing. The device includes a fluid channel including an inlet at a first end and an outlet at a second end, a cavity region coupled to the fluid channel, and a polymer based membrane coupled between the fluid channel and the cavity region. Additionally, the device includes a first capacitor electrode coupled to the membrane, a second capacitor electrode coupled to the cavity region and physically separated from the first capacitor electrode by at least the cavity region, and an electrical power source coupled between the first capacitor electrode and the second capacitor electrode and causing an electric field at least within the cavity region. The polymer based membrane includes a polymer.

    Abstract translation: 用于电容感测的微流体装置和方法。 该装置包括流体通道,其包括在第一端处的入口和在第二端处的出口,耦合到流体通道的空腔区域以及耦合在流体通道和腔区域之间的基于聚合物的膜。 另外,该器件包括耦合到膜的第一电容器电极,耦合到空腔区域的第二电容器电极,并且至少通过腔区域与第一电容器电极物理分离;以及电源,耦合在第一电容器电极和 所述第二电容器电极至少在所述腔区域内引起电场。 基于聚合物的膜包括聚合物。

    MEMS Sensor Suite on a Chip
    140.
    发明申请
    MEMS Sensor Suite on a Chip 有权
    MEMS传感器套件在芯片上

    公开(公告)号:US20080163687A1

    公开(公告)日:2008-07-10

    申请号:US12051905

    申请日:2008-03-20

    Abstract: The MEMS Sensor Suite on a Chip provides the capability, monolithically integrated onto one MEMS chip, to sense temperature, humidity, and two axes of acceleration. The device incorporates a MEMS accelerometer, a MEMS humidity sensor, and a MEMS temperature sensor on one chip. These individual devices incorporate proof masses, suspensions, humidity sensitive capacitors, and temperature sensitive resistors (thermistors) all fabricated in a common fabrication process that allows them to be integrated onto one micromachined chip. The device can be fabricated in a simple micromachining process that allows its size to be miniaturized for embedded and portable applications. During operation, the sensor suite chip monitors temperature levels, humidity levels, and acceleration levels in two axes. External circuitry allows sensor readout, range selection, and signal processing.

    Abstract translation: 芯片上的MEMS传感器套件提供单一集成到一个MEMS芯片上的能力,以感测温度,湿度和两个加速轴。 该器件在一个芯片上集成了MEMS加速度计,MEMS湿度传感器和MEMS温度传感器。 这些单独的器件包含所有在通用制造工艺中制造的校准质量,悬浮液,湿度敏感电容器和温度敏感电阻器(热敏电阻器),从而允许它们集成到一个微加工芯片上。 该器件可以在简单的微加工工艺中制造,允许其尺寸被小型化以用于嵌入式和便携式应用。 在运行过程中,传感器套件芯片监测两个轴的温度水平,湿度水平和加速度水平。 外部电路允许传感器读数,范围选择和信号处理。

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