公开(公告)号：US06653575B2

公开(公告)日：2003-11-25

申请号：US09764467

申请日：2001-01-17

Applicant: Gregg J. Armezzani ,  Matthew A. Heller

Inventor： Gregg J. Armezzani ,  Matthew A. Heller

IPC: H05K114

CPC classification number: H01L23/4985 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2924/0002 ,  H05K3/363 ,  H05K2201/096 ,  H05K2201/10666 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/0455 ,  H01L2924/00

Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.

公开(公告)号：US06503088B2

公开(公告)日：2003-01-07

申请号：US09991420

申请日：2001-11-16

Applicant: Apurba Roy

Inventor： Apurba Roy

IPC: H01R1200

CPC classification number: H01R12/57 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01R12/52 ,  H05K3/3426 ,  H05K3/368 ,  H05K2201/1031 ,  H05K2201/10666 ,  H05K2201/10856 ,  Y02P70/611 ,  H01L2924/00

Abstract: An I-channel surface mount connector includes a length of cylindrical rod having a generally I-shaped cross section is improved by providing an extended mounting flange. When a first circuit device is connected to a second circuit device with the extended flange extending outward of the first device, the flange can extend beyond the periphery of the first device. This extension has the advantage that the solder bond between the flange and the second device can be easily inspected from above using visual inspection equipment.

Abstract translation: I沟道表面安装连接器包括通过提供延伸的安装凸缘而改进的具有大致I形截面的圆柱形杆的长度。 当第一电路装置连接到具有从第一装置向外延伸的延伸法兰的第二电路装置时，凸缘可以延伸超出第一装置的周边。 该扩展的优点在于，可以使用目视检查设备从上方容易地检查凸缘和第二装置之间的焊接接合。

公开(公告)号：US20020145697A1

公开(公告)日：2002-10-10

申请号：US10096322

申请日：2002-03-12

Inventor： Kazushige Hoshina

IPC: G02F001/1345

CPC classification number: G02F1/13452 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/0326 ,  H05K2201/10666

Abstract: A wiring substrate 7 is attached by pressure to a substrate overhang with an ACF 6b, and substrate terminals 21 formed on the substrate overhang 2c from ITO and the first terminals 21 formed on the rear surface of wiring substrate 7 are electrically connected. The wiring substrate 7 has second terminals 27 on its surface and these second terminals 27 are electrically connected to the first terminals located on the rear surface via a throughhole. The wiring pattern on the wiring substrate 7 is formed from a material with an electric resistance lower than that of the ITO forming the substrate terminals 21, which makes it possible to hold the resistance of the wiring on the substrate overhang 2c to a low value.

Abstract translation: 布线基板7通过压力附接到基板上，用ACF 6b悬垂，并且从ITO形成在基板突出部2c上的基板端子21和形成在布线基板7的背面上的第一端子21电连接。 布线基板7在其表面上具有第二端子27，并且这些第二端子27经由通孔与位于后表面的第一端子电连接。 布线基板7上的布线图形由电阻低于形成基板端子21的ITO的电阻的材料形成，这使得可以将基板突出部2c上的布线的电阻保持为低值。

公开(公告)号：US06460773B1

公开(公告)日：2002-10-08

申请号：US09660946

申请日：2000-09-13

Applicant: Hiroshi Kaiya ,  Toshiyuki Honda

Inventor： Hiroshi Kaiya ,  Toshiyuki Honda

IPC: G06K1906

CPC classification number: G06K19/07747 ,  G06K19/07745 ,  G06K19/07749 ,  G06K19/07769 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48465 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K1/182 ,  H05K3/321 ,  H05K3/3436 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10477 ,  H05K2201/10666 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A module of a combination card can be incorporated into a card body with solder being easily melted, and heat transmission to portions other than the antenna connection terminals is reduced. A card body is provided with an antenna. The module includes a substrate which has a terminal surface on which at least one external connection terminal is formed and a mounting surface opposite to the terminal surface. An IC chip is mounted on the mounting surface. The module includes at least one antenna connection terminal located on the mounting surface. The antenna connection terminal is connected to the antenna, and at least a part of the antenna connection terminal is exposed on the terminal surface.

Abstract translation: 组合卡的模块​​可以结合到卡体中，焊料容易熔化，并且减少对天线连接端子以外的部分的热传递。 卡体设有天线。 该模块包括具有端子表面的基板，至少一个外部连接端子形成在该端子表面和与端子表面相对的安装表面。 IC芯片安装在安装面上。 该模块包括位于安装表面上的至少一个天线连接端子。 天线连接端子连接到天线，天线连接端子的至少一部分露出在端子表面上。

公开(公告)号：US06310301B1

公开(公告)日：2001-10-30

申请号：US09288749

申请日：1999-04-08

Applicant: Randy T. Heinrich ,  Robert J. Roessler ,  Thang D. Truong ,  Matthew A. Wilkowski ,  William L. Woods, Jr.

Inventor： Randy T. Heinrich ,  Robert J. Roessler ,  Thang D. Truong ,  Matthew A. Wilkowski ,  William L. Woods, Jr.

IPC: H05K116

CPC classification number: H05K3/368 ,  H05K1/141 ,  H05K1/165 ,  H05K3/3436 ,  H05K2201/10234 ,  H05K2201/10257 ,  H05K2201/10666 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/0455 ,  Y02P70/613

Abstract: An inter-substrate conductive mount for a surface mountable circuit board, a method of manufacturing the circuit board and a surface mountable power magnetic device. In one embodiment, the circuit board includes: (1) a substrate, (2) an inter-substrate conductive mount composed of a material having a melting point above a solder reflow temperature and including a compliant solder joint at an interface of the substrate and (3) a solder located proximate the conductive mount, the conductive mount of a sufficiently low weight such that a surface tension of a liquid state of the solder is sufficient to maintain the conductive mount in contact with the substrate as the solder is brought to the reflow temperature, the conductive mount being capable of mounting the substrate to an adjacent substrate and providing a conductive path therebetween.

Abstract translation: 一种用于表面安装电路板的基板间导电座，一种制造电路板的方法和一种可表面安装的电力磁性装置。 在一个实施例中，电路板包括：（1）基板，（2）由具有高于焊料回流温度的熔点的材料构成的基板间导电安装件，并且在基板的界面处包括柔性焊接点 （3）位于导电安装座附近的焊料，该导电安装件具有足够低的重量，使得焊料的液体状态的表面张力足以使导电安装座与衬底接触，因为焊料被带到 回流温度，导电安装件能够将衬底安装到相邻的衬底上并且在它们之间提供导电路径。

公开(公告)号：US20010014015A1

公开(公告)日：2001-08-16

申请号：US09764465

申请日：2001-01-17

Inventor： Gregg J. Armezzani ,  Matthew A. Heller

IPC: H05K001/14

CPC classification number: H01L23/4985 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2924/0002 ,  H05K3/363 ,  H05K2201/096 ,  H05K2201/10666 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/0455 ,  H01L2924/00

Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.

公开(公告)号：US20010009202A1

公开(公告)日：2001-07-26

申请号：US09819383

申请日：2001-03-28

Inventor： Donald M. Metzelaar ,  Kevin L. Kent ,  Anthony J. Richter

IPC: H05K001/09 ,  H05K001/11

CPC classification number: H05K3/363 ,  H05K3/4038 ,  H05K2201/0305 ,  H05K2201/10477 ,  H05K2201/10666 ,  H05K2203/0285 ,  H05K2203/0405 ,  H05K2203/107

Abstract: An interconnect for connecting two printed circuit boards (30, 32) directly together and a method for achieving same. A through hole (70) is formed in a first printed circuit board (30), which is surrounded by a conductive layer (62). A conductive layer (82) is also deposited on a second printed circuit board (32) opposite the through hole (70). The conductive layers (62, 82) allow for the conduction of electrical signals between and about the two printed circuit boards (30, 32). In the preferred embodiment, the conductive layer (62, 82) is copper metalization and the through hole (70) is plated with copper. A solder joint (58) is applied to fill the through hole (70) and establish electrical connection between the conductive layers (62, 82) on the two printed circuit boards (30, 32). Electrical connection is established by applying the solder joint (58) to and between the conductive layers (62, 82) on both boards (30, 32). In an alternative embodiment using a non-plated through hole (70), the interconnect is achieved by either repetitious localized impact, induced vibration or ultrasonic vibration applied to the solder joint (58) after the solder (56) is deposited.

Abstract translation: 用于将两个印刷电路板（30,32）直接连接在一起的互连以及用于实现其的方法。 在由导电层（62）包围的第一印刷电路板（30）中形成通孔（70）。 导电层（82）也沉积在与通孔（70）相对的第二印刷电路板（32）上。 导电层（62,82）允许在两个印刷电路板（30,32）之间和周围传导电信号。 在优选实施例中，导电层（62,82）是铜金属化，并且通孔（70）镀有铜。 施加焊接接头（58）以填充通孔（70）并在两个印刷电路板（30,32）上的导电层（62,82）之间建立电连接。 通过将焊接接头（58）施加到两个板（30,32）上的导电层（62,82）之间和之间来建立电连接。 在使用非电镀通孔（70）的替代实施例中，通过在沉积焊料（56）之后施加到焊料接头（58）上的重复局部冲击，诱发振动或超声波振动来实现互连。

公开(公告)号：US06199273B1

公开(公告)日：2001-03-13

申请号：US08769449

申请日：1996-12-19

Applicant: Toshihiko Kubo ,  Takuji Ito ,  Hiroshi Takamichi ,  Akihiro Hidaka

Inventor： Toshihiko Kubo ,  Takuji Ito ,  Hiroshi Takamichi ,  Akihiro Hidaka

IPC: H01R900

CPC classification number: H01L23/49816 ,  H01L21/4853 ,  H01L2224/11334 ,  H01L2924/15173 ,  H05K1/113 ,  H05K3/0094 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/3478 ,  H05K2201/0379 ,  H05K2201/09572 ,  H05K2201/0959 ,  H05K2201/10666 ,  H05K2201/10992 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/074 ,  H05K2203/1394 ,  Y02P70/613 ,  Y10T29/49147 ,  Y10T29/49149

Abstract: A ball-grid array connector structure for an electronic package in which the ball pitch can be reduced to increase the packaging density has a plastic substrate having at least one hollow through-hole and an electrode covering the wall of the through-hole and forming an electrode pad surrounding the through-hole on each surface of the substrate. A metallic ball is joined, either directly or through a solder or a combination of a metallic bump and a solder, to the electrode pad on at least one surface of the substrate at the position of the through-hole. The connector structure can be formed either by sealing an open end of the through-hole on the side to which the ball is not joined, or increasing the pressure within the through-hole by a pressure-control mechanism, before the through-hole is blocked by reflowing the ball itself or the metallic bump or solder used to connect the ball.

Abstract translation: 用于电子封装的球栅阵列连接器结构，其中球节距可以减小以增加封装密度，具有具有至少一个中空通孔的塑料基板和覆盖通孔壁的电极，并形成 围绕基板每个表面上的通孔的电极焊盘。 金属球直接或通过焊料或金属凸块和焊料的组合连接到通孔位置处的基板的至少一个表面上的电极焊盘。 连接器结构可以通过在通孔之前通过密封球体未接合的一侧上的通孔的开口端或通过压力控制机构来增加通孔内的压力来形成 通过回流球本身或用于连接球的金属凸块或焊料来阻止。

公开(公告)号：US6100475A

公开(公告)日：2000-08-08

申请号：US67271

申请日：1998-04-27

Applicant: Yinon Degani ,  King Lien Tai

Inventor： Yinon Degani ,  King Lien Tai

IPC: H01L21/60 ,  H01L23/12 ,  H01L23/498 ,  H05K1/18 ,  H05K3/34 ,  H05K1/11 ,  B23K31/00

CPC classification number: H01L23/49827 ,  H05K3/3436 ,  H05K3/3463 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K2201/09572 ,  H05K2201/10666 ,  H05K2201/10992 ,  Y02P70/613

Abstract: The specification describes techniques for attaching double sided circuit boards having plated through holes to interconnection substrates using solder bump arrays. The through holes are filled with a high melting point solder which allows solder bumps to be located directly on the through hole thus saving board area and reducing the interconnection length.

Abstract translation: 本说明书描述了使用焊料凸块阵列将具有电镀通孔的双面电路板连接到互连基板的技术。 通孔填充有高熔点焊料，其允许焊料凸块直接位于通孔上，从而节省了电路板面积并减小了互连长度。

公开(公告)号：US6069407A

公开(公告)日：2000-05-30

申请号：US195349

申请日：1998-11-18

Applicant: Ahmad Hamzehdoost

Inventor： Ahmad Hamzehdoost

IPC: H01L23/31 ,  H01L23/498 ,  H05K3/34 ,  H05K3/40 ,  H01L23/52

CPC classification number: H01L23/49833 ,  H01L23/3128 ,  H05K3/3436 ,  H01L2224/05599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H05K2201/0305 ,  H05K2201/10666 ,  H05K3/4046 ,  Y02P70/613

Abstract: A die-up configuration includes a rigid circuit board with electrically conductive plated-through holes formed therethrough and an integrated-circuit die mounted to the upper surface of which a flexible insulated tape layer is fixed to the upper surface of a rigid circuit board and which has a number of wire-bonding sites. Conductive vias or plated-through holes are provided for connecting the wire-bonding sites on the upper surface of the flexible insulated tape layer to the contact areas formed on the lower surface of the flexible insulated tape layer. Conductors are provided for connecting respective contact areas on the lower surface of the flexible insulated tape layer to solder balls on the bottom of the rigid circuit board.

Abstract translation: 裸芯片配置包括刚性电路板，其具有穿过其中形成的导电电镀通孔，以及安装到其上表面的集成电路裸片，柔性绝缘带层固定到刚性电路板的上表面， 具有多个引线接合点。 提供导电通孔或电镀通孔，用于将柔性绝缘带层的上表面上的引线接合位置与形成在柔性绝缘带层的下表面上的接触区域相连接。 提供导体，用于将柔性绝缘带层的下表面上的各个接触区域连接到刚性电路板底部的焊球。