OPTICAL DEVICE INCLUDING A FIBER ALIGNMENT STRUCTURE

    公开(公告)号:US20250004218A1

    公开(公告)日:2025-01-02

    申请号:US18692978

    申请日:2022-09-19

    Abstract: An optical device includes an optical fiber and an optical die connected to the optical fiber. The optical fiber includes a core layer, a cladding layer formed on the core layer, and a first portion of a fiber alignment structure formed on the cladding layer. The optical die includes a die main body, an optical waveguide located in the die main body, and a second portion of the fiber alignment structure formed on the die main body and mated to the first portion of the fiber alignment structure so as to align the core layer of the optical fiber with the optical waveguide.

    Isolation of waveguide-integrated detectors using a back end of line process

    公开(公告)号:US12176672B2

    公开(公告)日:2024-12-24

    申请号:US17239085

    申请日:2021-04-23

    Abstract: An optical device includes a substrate, a dielectric layer on the substrate, a waveguide within the dielectric layer, a light sensitive component (e.g., a photodetector) in the dielectric layer and coupled to the waveguide, and a plurality of light isolation structures in at least one of the substrate or the dielectric layer and configured to prevent stray light from reaching the light sensitive component. In some embodiments, a light isolation structure in the plurality of light isolation structures includes two opposing sidewalls and a filling material between the two opposing sidewalls. The two opposing sidewalls include an optical isolation layer. The filling material is characterized by a coefficient of thermal expansion (CTE) matching a CTE of at least one of the substrate or the dielectric layer.

    Optimization techniques for quantum computing device simulation

    公开(公告)号:US12169672B2

    公开(公告)日:2024-12-17

    申请号:US17114143

    申请日:2020-12-07

    Abstract: Computer systems and methods are provided for increasing a rate of simulation for quantum computing devices. A quantum computing device includes a plurality of gates, each of which is coupled to one or more modes. In the provided computer systems and methods, a device definition and state information for the quantum computing device are received. The state information includes a plurality of input patterns, each of which indicates a number of input bosons that correspond to a respective mode of the quantum computing device, and an amplitude that corresponds to each input pattern. The device definition includes a plurality of sets of gate values that indicate modification by a respective gate of an input pattern probability. A first group of input patterns is generated for a first gate. The first group of input patterns includes a subset of the plurality of input patterns that meet grouping criteria.

    Photon Number Resolving Superconducting Detector

    公开(公告)号:US20240410749A1

    公开(公告)日:2024-12-12

    申请号:US18669307

    申请日:2024-05-20

    Abstract: A method of resolving a number of photons received by a photon detector includes optically coupling a waveguide to a superconducting wire having alternating narrow and wide portions; electrically coupling the superconducting wire to a current source; and electrically coupling an electrical contact in parallel with the superconducting wire. The electrical contact has a resistance less than a resistance of the superconducting wire while at least one narrow portion of the superconducting wire is in a non-superconducting state. The method includes providing to the superconducting wire, from the current source, a current configured to maintain the superconducting wire in a superconducting state in the absence of incident photons; receiving one or more photons via the waveguide; measuring an electrical property of the superconducting wire, proportional to a number of photons incident on the superconducting wire; and determining the number of received photons based on the electrical property.

    Compiler systems and methods for quantum computer with reduced idle volume

    公开(公告)号:US12164891B2

    公开(公告)日:2024-12-10

    申请号:US18108561

    申请日:2023-02-10

    Inventor: Daniel Litinski

    Abstract: A fault-tolerant quantum computer using topological codes such as surface codes can have an architecture that reduces the amount of idle volume generated. The architecture can include qubit modules that generate surface code patches for different qubits and a network of interconnections between different qubit modules. The interconnections can include “port” connections that selectably enable coupling of boundaries of surface code patches generated in different qubit modules and/or “quickswap” connections that selectably enable transferring the state of a surface code patch from one qubit module to another. Port and/or quickswap connections can be made between a subset of qubit modules. For instance port connections can connect a given qubit module to other qubit modules within a fixed range. Quickswap connections can provide a log-tree network of direct connections between qubit modules.

    MULTIPLEXING FOR PHOTONIC CIRCUITS
    147.
    发明申请

    公开(公告)号:US20240405888A1

    公开(公告)日:2024-12-05

    申请号:US18695804

    申请日:2022-09-28

    Abstract: Circuits and methods can implement reconfigurable spatial rearrangement (also referred to as “spatial multiplexing”) for a group of photons propagating in waveguides. For instance, two sets of small optical multiplexer circuits (such as two sets of 2×2 optical multiplexer circuits or two sets of 3×3 optical multiplexer circuits) can be used to rearrange a pattern of photons on a first set of waveguides into a usable input pattern for a downstream optical circuit.

    Modular interconnected quantum photonic system

    公开(公告)号:US12149242B1

    公开(公告)日:2024-11-19

    申请号:US18589993

    申请日:2024-02-28

    Abstract: A modular quantum entanglement processing system can include a plurality of seed state systems, resource state systems, and fusion systems that can be ordered in different arrangements. The systems can be composed of modular assemblies or chips, such that the systems can be modularized and extended to perform entanglement based processing of tasks in a scalable manner. Some of the assemblies or chips of the different systems can be designed to operate at cryogenic temperatures, such as detector, while other assemblies or chips of the different systems can operate at room temperature, where the different chip types can be coupled to one another using fiber optic cables.

    Superconducting field-programmable gate array

    公开(公告)号:US12119820B2

    公开(公告)日:2024-10-15

    申请号:US18387402

    申请日:2023-11-06

    CPC classification number: H03K19/195 G01J1/44 H10N60/30 H10N60/84 G01J2001/442

    Abstract: A programmable circuit includes a superconducting multi-dimensional array. The programmable circuit further includes a plurality of photon detectors coupled to respective portions of the superconducting multi-dimensional array, each photon detector configured to selectively provide input to a corresponding respective portion sufficient to transition the corresponding respective portion from a superconducting state to a non-superconducting state. The programmable circuit also includes one or more electrical terminals coupled to respective second portions of the superconducting multi-dimensional array.

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