Abstract:
An electron beam device wherein a low temperature gaseous plasma is generated in a chamber divided by two parallel wire grids. A semiconductor wafer serves as a cathode drawing ions from the plasma to impinge on the wafer, generating secondary electrons that are accelerated toward an anode on the opposite side of the grids where a target resides. In order to have a beam with uniform cross-sectional flux characteristics, the semiconductor wafer is doped with a graded dopant concentration that promotes a uniform beam.
Abstract:
Expressing a perveance of an electron gun to be determined by a form of the electron gun as P&mgr;, a voltage to be impressed on an accelerating electrode Va and a beam current Ib, voltage Va which satisfies the following expression, Ib
Abstract:
An electron emitting structure having deflectable electrodes, such as found in grating light valves (GLVs) is provided. In one implementation, the structure includes a substrate having base electrodes and gate electrodes coupled thereto and insulated from each other, and an emitting material deposited on active regions of the base electrodes. Upon applying a voltage potential difference between a base electrode and a gate electrode, a portion of one of the base electrode and the gate electrode deflects through electrostatic force positioning the portion of the one of the base electrode and the gate electrode relative to another one of the base electrode and the gate electrode such that an electric field is produced that is sufficient to cause an emission from an emitting material deposited on the base electrode. In preferred form, lower drive voltages are required to provide the electric field without requiring sub-micron spacing between electrodes.
Abstract:
A cold-cathode electron source having an improved utilization efficiency of an electron beam and a simple structure. The cold-cathode electron source comprises a gate electrode (4) provided on a substrate (2) through an insulating layer (3) and an emitter (6) extending through the insulating layer (3) and the gate electrode (4) and disposed in an opening of the gate. During the emission of electrons from the emitter (6), the following relationships are satisfied: 10 nullV/nullmnullnull(VanullVg)/(HanullHg)nullVg/Hg; and Vg/Hg nullV/nullmnullnullVanull10null4null(9.7null1.3null1n(Hg))null(1000/Ha)0.5, where Ha nullnullmnull is an anode-emitter distance, Va nullVnull is an anode-emitter voltage, Hg nullnullmnull is a gate-emitter distance, and Vg nullVnull is a gate-emitter voltage.
Abstract translation:具有提高电子束的利用效率和简单结构的冷阴极电子源。 冷阴极电子源包括通过绝缘层(3)设置在基板(2)上的栅极(4)和延伸穿过绝缘层(3)和栅电极(4)的发射极(6) 在门口的开口。 在从发射体(6)发射电子的过程中,满足以下关系:10 V / V m =(Va-Vg)/(Ha-Hg)> = Vg / Hg; 和V g / Hg [V / mum] = Vax 10 -4(9.7-1.3x1n(Hg))x(1000 / Ha)<0.5>,其中Ha [m]是阳极 - 发射极距离, V]是阳极 - 发射极电压,Hg [m]是栅 - 发射极距离,Vg [V]是栅 - 发射极电压。
Abstract:
The invention comprises a method of fabricating a vacuum microtube device comprising the steps of forming a cathode layer comprising an array of electron emitters, forming a gate layer comprising an array of openings for passing electrons from the electron emitters, and forming an anode layer for receiving electrons from the emitters. The cathode gate layer and the anode layer are vertically aligned and bonded together with intervening spacers on a silicon substrate so that electrons from respective emitters pass through respective gate openings to the anode. The use of substrate area is highly efficient and electrode spacing can be precisely controlled. An optional electron multiplying structure providing secondary electron emission material can be disposed between the gate layer and the anode in the path of emitted electrons.
Abstract:
An FED and a method of manufacture are provided. The FED includes a cathode assembly containing an improved column line structure. The column line structure includes a conductive structure formed on a substrate. A resistive layer is formed on the conductive structure, and an insulator layer is formed partly over the resistive layer. The contact between the base of the emitter tips and the addressing column line is achieved through a lateral side that is not covered by the insulator layer. The insulator layer helps reduce the possibility of electrical shorting between the addressing column line and the row line structure of the cathode assembly. The insulator layer on top of the addressing column line will allow the use of a thinner subsequent dielectric layer. This thinner dielectric layer, which supports the grid, will provide a lower RC time constant and help achieve better video rate operation. The thinner dielectric layer also will result in smaller grid openings above the tips. This will provide for better beam spots, and, therefore, better image resolution. The thinner dielectric layer will require less applied voltage to extract electrons from the tips, resulting in lower power consumption for the FED.
Abstract:
An electron emitting structure having deflectable electrodes, such as found in grating light valves (GLVs) is provided. In one implementation, the structure includes a substrate having base electrodes and gate electrodes coupled thereto and insulated from each other, and an emitting material deposited on active regions of the base electrodes. Upon applying a voltage potential difference between a base electrode and a gate electrode, a portion of one of the base electrode and the gate electrode deflects through electrostatic force positioning the portion of the one of the base electrode and the gate electrode relative to another one of the base electrode and the gate electrode such that an electric field is produced that is sufficient to cause an emission from an emitting material deposited on the base electrode. In preferred form, lower drive voltages are required to provide the electric field without requiring sub-micron spacing between electrodes.
Abstract:
A manufacturing method for an electron-emitting source of triode structure, including forming a cathode layer on a substrate, forming a dielectric layer on the cathode layer, and positioning an opening in the dielectric layer to expose the cathode layer, wherein the opening has a surrounding region, forming a gate layer on the dielectric layer, except on the surrounding region, forming a hydrophilic layer in the opening, forming a hydrophobic layer on the gate layer and the surrounding region, wherein the hydrophobic layer contacts the ends of the hydrophilic layer, dispersing a carbon nanotube solution on the hydrophilic layer using ink jet printing, executing a thermal process step, and removing the hydrophobic layer. According to this method, carbon nanotubes are deposited over a large area in the gate hole.
Abstract:
Systems and methods are described for addressable field emission array (AFEA) chips. A method of operating an addressable field-emission array, includes: generating a plurality of electron beams from a pluralitly of emitters that compose the addressable field-emission array; and focusing at least one of the plurality of electron beams with an on-chip electrostatic focusing stack. The systems and methods provide advantages including the avoidance of space-charge blow-up.
Abstract:
A plurality of field emission device cathodes each generate emission of electrons, which are then controlled and focused using various electrodes to produce an electron beam. Horizontal and vertical deflection techniques, similar to those used within a cathode ray tube, operate to scan the individual electron beams onto portions of a phosphor screen in order to generate images. The use of the plurality of field emission cathodes provides for a flatter screen depth than possible with a typical cathode ray tube.