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公开(公告)号：US09241400B2
公开(公告)日：2016-01-19
申请号：US13974569
申请日：2013-08-23
Applicant: Seagate Technology LLC
Inventor： John Wayne Shaw , Jacob Charles Matousek , Todd Michael Lammers
IPC: H05K1/02
CPC classification number: H05K1/0253 , H05K1/0224 , H05K2201/0723 , H05K2201/09236 , H05K2201/09681
Abstract: A rigid multi-layer printed circuit board (PCB) has an embedded elongated conductor between opposing first and second reference planes. The first and second reference planes are formed of conductive material and are electrically isolated from the conductor by intervening insulative material. Each of the first and second reference planes have a plurality of spaced apart windows extending therethrough, the windows aligned with the elongated conductor.
Abstract translation: 刚性多层印刷电路板（PCB）在相对的第一和第二参考平面之间具有嵌入的细长导体。 第一和第二参考平面由导电材料形成，并通过介入的绝缘材料与导体电隔离。 第一和第二参考平面中的每一个具有从其延伸穿过的多个间隔开的窗口，窗口与细长导体对准。
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公开(公告)号：US20150340751A1
公开(公告)日：2015-11-26
申请号：US14717280
申请日：2015-05-20
Applicant: FUJIKURA LTD.
Inventor： Hirohito WATANABE , Taiji OGAWA
CPC classification number: H05K1/0225 , H01P1/022 , H01P3/08 , H01P3/085 , H05K1/025 , H05K1/0393 , H05K2201/0715 , H05K2201/09027 , H05K2201/09681 , H05K2201/09727
Abstract: To suppress occurrence of a difference in transmission time due to a difference in length between signal lines, there is provided a printed wiring board having: an insulating substrate (10); a first signal line (L31) formed on the insulating substrate (10); a second signal line (L32) having a shorter length than that of the first signal line (L31); and a ground layer (30) formed for the first signal line (L31) and the second signal line (L31) via an insulating material (10). The ground layer (30) includes a first ground layer (G31) corresponding to a first region (D1) and a second ground layer (G32) corresponding to a second region (D2). The first region (D1) is defined based on the first signal line (L31) and has a first predetermined width (W31). The second region (D2) is defined based on the second signal line (L32) and has a second predetermined width (W32). The first ground layer (G31) has a remaining ratio lower than a remaining ratio of the second ground layer (G32).
Abstract translation: 为了抑制由于信号线之间的长度差导致的传输时间差的发生，提供了一种印刷线路板，其具有：绝缘基板（10）; 形成在所述绝缘基板（10）上的第一信号线（L31）。 具有比第一信号线（L31）短的长度的第二信号线（L32）; 和经由绝缘材料（10）形成的第一信号线（L31）和第二信号线（L31）的接地层（30）。 接地层（30）包括对应于第一区域（D1）的第一接地层（G31）和对应于第二区域（D2）的第二接地层（G32）。 第一区域（D1）基于第一信号线（L31）定义并具有第一预定宽度（W31）。 第二区域（D2）基于第二信号线（L32）定义并具有第二预定宽度（W32）。 第一接地层（G31）的剩余比率比第二接地层（G32）的剩余率低。
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公开(公告)号：US09179557B2
公开(公告)日：2015-11-03
申请号：US13968378
申请日：2013-08-15
Applicant: SHENZHEN O-FILM TECH CO., LTD
Inventor： Genchu Tang , Shengcai Dong , Wei Liu , Bin Tang
CPC classification number: H05K3/465 , G06F3/044 , G06F2203/04103 , G06F2203/04112 , H05K1/0289 , H05K3/4605 , H05K2201/09681 , H05K2203/0108
Abstract: A touch screen comprises a glass substrate, a first conductive layer, an insulating adhesive layer and a second conductive layer. The first conductive layer is directly formed on the glass substrate and comprises first conductive pattern areas; the insulating adhesive layer is attached to the glass substrate, and one side of the insulating adhesive layer close to the glass substrate forms a first groove; the first conductive pattern area is received in the first groove and insulated from each other; one side of the insulating adhesive layer away from the glass substrate, is provided with a second groove; and the second conductive layer is received in the second groove, thus forming a plurality of second conductive pattern areas insulated with each other. The first conductive layer is directly formed on the glass substrate and made of a metal material, thus omitting an adhesive layer and saving the cost.
Abstract translation: 触摸屏包括玻璃基板，第一导电层，绝缘粘合剂层和第二导电层。 第一导电层直接形成在玻璃基板上并且包括第一导电图案区域; 绝缘粘合剂层附着在玻璃基板上，绝缘粘合层的靠近玻璃基板的一侧形成第一凹槽; 第一导电图案区域被接收在第一凹槽中并彼此绝缘; 绝缘粘合剂层远离玻璃基板的一侧设置有第二凹槽; 并且第二导电层被接收在第二凹槽中，从而形成彼此绝缘的多个第二导电图案区域。 第一导电层直接形成在玻璃基板上并由金属材料制成，从而省略了粘合剂层并节约了成本。
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公开(公告)号：US09137893B2
公开(公告)日：2015-09-15
申请号：US13751450
申请日：2013-01-28
Applicant: Eastman Kodak Company
Inventor： John Andrew Lebens , David Paul Trauernicht , Yongcai Wang , Ronald Steven Cok
CPC classification number: H05K1/0296 , G06F3/044 , H05K1/02 , H05K1/0289 , H05K3/1258 , H05K2201/0108 , H05K2201/0376 , H05K2201/09227 , H05K2201/09272 , H05K2201/09681 , H05K2201/09727 , Y10T428/26
Abstract: An electrical conductor includes a substrate having micro-channels formed in the substrate. A plurality of spaced-apart first micro-wires is located on or in the micro-channels, the first micro-wires extending across the substrate in a first direction. A plurality of spaced-apart second micro-wires is located on or in the micro-channels, the second micro-wires extending across the substrate in a second direction different from the first direction. Each second micro-wire is electrically connected to at least two first micro-wires and at least one of the second micro-wires has a width less than the width of at least one of the first micro-wires.
Abstract translation: 电导体包括在衬底中形成有微通道的衬底。 多个间隔开的第一微电线位于微通道上或微通道中，第一微电线在第一方向上延伸穿过衬底。 多个间隔开的第二微电线位于微通道上或微通道中，第二微电线沿与第一方向不同的第二方向延伸穿过衬底。 每个第二微线电连接到至少两个第一微线，并且至少一个第二微线的宽度小于第一微线中的至少一个的宽度。
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公开(公告)号：US20150235122A1
公开(公告)日：2015-08-20
申请号：US14564111
申请日：2014-12-09
Applicant: David Finn , Klaus Ummenhofer
Inventor： David Finn , Klaus Ummenhofer
IPC: G06K19/077 , G06K7/10
CPC classification number: G06K19/07794 , G06K7/10009 , G06K19/07754 , G06K19/07769 , H01F27/365 , H01F38/14 , H01F41/16 , H01Q1/2225 , H01Q1/2283 , H01Q7/00 , H05K1/0225 , H05K1/0233 , H05K1/167 , H05K1/183 , H05K3/1275 , H05K2201/0218 , H05K2201/0257 , H05K2201/026 , H05K2201/0266 , H05K2201/0317 , H05K2201/0323 , H05K2201/0723 , H05K2201/086 , H05K2201/09681 , H05K2201/0969 , H05K2201/09727 , H05K2201/10098
Abstract: Card body (CB) for a dual interface smart card (SC) comprising a metal foil (MF) or metallized layer (ML). An opening in the metal layer may be sized so that a coupler coil (CC) of a booster antenna (BA) is exposed. Improving coupling between a contactless reader and a transponder comprising providing a patch booster antenna (PBA) on a substrate disposed on the reader. Various booster antenna designs are disclosed.
Abstract translation: 包括金属箔（MF）或金属化层（ML）的双接口智能卡（SC）的卡体（CB）。 金属层中的开口的尺寸可以使得增强天线（BA）的耦合线圈（CC）暴露。 改善非接触读取器和应答器之间的耦合，包括在布置在读取器上的衬底上提供贴片增强天线（PBA）。 公开了各种增强天线设计。
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Patent Agency Ranking
公开(公告)号：US09087617B2
公开(公告)日：2015-07-21
申请号：US14325670
申请日：2014-07-08
Applicant: Lockheed Martin Corporation
Inventor： Stephen Gonya , Jesse Iannon
CPC classification number: G21F3/00 , H01L23/552 , H01L23/573 , H01L2924/0002 , H05K1/02 , H05K1/0209 , H05K1/0275 , H05K2201/0715 , H05K2201/09681 , H01L2924/00
Abstract: An X-ray obscuration (XRO) film comprising one or more metallic wire mesh layers and an adjacent layer of indium foil having portions which extend into openings of the wire mesh and in contact with metallic portions thereof. The XRO film can be capable of absorbing at least a portion of X-ray energy thereby creating an interference pattern when the XRO film is coupled with an electronic circuit and placed between an X-ray source and an X-ray detector and subjected to radiographic inspection. The interference pattern can create sufficient visual static to effectively obscure circuit lines in the electronic circuit when subjected to radiographic inspection techniques. The XRO film can be substantially thinner than existing solutions for preventing X-ray inspection with an exemplary embodiment being no more than 5 mils thick. The metallic XRO film can also provide electromagnetic shielding and/or heat dissipation for electronic circuits.
Abstract translation: 包括一个或多个金属丝网层和相邻的铟箔层的X射线遮蔽（XRO）膜，其具有延伸到金属丝网的开口中并与其金属部分接触的部分。 XRO膜能够吸收X射线能量的至少一部分，从而当XRO膜与电子电路耦合并且放置在X射线源和X射线检测器之间并经受射线照相时产生干涉图案 检查。 干涉图案可以产生足够的视觉静电，以在经受射线照相检查技术时有效地遮蔽电子电路中的电路线。 XRO膜可以比用于防止X射线检查的现有解决方案薄得多，示例性实施例不超过5密耳厚。 金属XRO膜还可以为电子电路提供电磁屏蔽和/或散热。
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公开(公告)号：US09066426B2
公开(公告)日：2015-06-23
申请号：US13985922
申请日：2013-07-06
Applicant: NANCHANG O-FILM TECH. CO., LTD.
Inventor： Fei Zhou , Miaoqian Cao
CPC classification number: H05K1/0296 , G06F3/044 , G06F2203/04112 , H05K1/0287 , H05K2201/0108 , H05K2201/09681
Abstract: A transparent conductive film includes a substrate, a transparent conductive layer, a lead electrode, and a first connecting wire, the substrate includes a first region and a second region located on the edge of the substrate; the transparent conductive layer is embedded in the first region, the lead electrode is formed on the second region; first connecting wire is formed on the substrate and located between the transparent conductive layer and the lead electrode, thereby the conductive material of the first conductive mesh and that of second conductive mesh are electrically connected; the first connecting is arranged between the transparent conductive layer and the lead electrode for electrically connecting the transparent conductive layer and the lead electrode, which can enhance the electrical connection strength between the transparent conductive layer and the lead electrode, such that the conductivity of the conductive film is great, and the yield is improved.
Abstract translation: 透明导电膜包括基板，透明导电层，引线电极和第一连接线，所述基板包括位于所述基板的边缘上的第一区域和第二区域; 所述透明导电层嵌入在所述第一区域中，所述引线电极形成在所述第二区域上; 第一连接线形成在基板上并且位于透明导电层和引线电极之间，由此第一导电网的导电材料和第二导电网的导电材料电连接; 第一连接被布置在透明导电层和引线电极之间，用于电连接透明导电层和引线电极，这可以增强透明导电层和引线电极之间的电连接强度，使得导电 电影是伟大的，产量提高。
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158.发明授权公开(公告)号：US09053282B2
公开(公告)日：2015-06-09
申请号：US14288692
申请日：2014-05-28
Applicant: Jinwoo Choi
Inventor： Jinwoo Choi
CPC classification number: G06F17/5077 , G06F2217/82 , H01L23/15 , H01L23/49822 , H01L23/49827 , H01L23/50 , H01L2924/0002 , H05K1/0224 , H05K1/0225 , H05K3/4629 , H05K2201/09681 , H01L2924/00
Abstract: An improved multi-layered ceramic package includes a plurality of signal planes, each having one or more signal lines; a plurality of vias, each providing one of a voltage (Vdd) power connection or a ground (Gnd) connection; and at least one reference mesh plane adjacent to one or more signal planes. The reference mesh plane includes spaced mesh lines that are separated by spaces that alternate in a narrow-wide or wide-narrow pattern. A multi-layered ceramic package, using the mesh plane with alternating spaces, generates significantly lower far-end (FE) noise in the ceramic package than a conventional mesh plane with constant spaces. The noise is further reduced by placing shield lines on opposite sides of signal lines in the signal plane. A method, computer system, and program code that generate the design for the multi-layered ceramic package are also disclosed.
Abstract translation: 一种改进的多层陶瓷封装包括多个信号面，每个具有一个或多个信号线; 多个通孔，每个通孔提供电压（Vdd）电源连接或地（Gnd）连接中的一个; 以及与一个或多个信号平面相邻的至少一个参考网格平面。 参考网格平面包括间隔开的网格线，它们以窄宽或宽窄图案交替的间隔分开。 与具有恒定空间的常规网格平面相比，使用具有交替空间的网格平面的多层陶瓷封装在陶瓷封装中产生明显较低的远端（FE）噪声。 通过将屏蔽线放置在信号平面中的信号线的相对侧上来进一步降低噪声。 还公开了一种生成多层陶瓷封装的设计的方法，计算机系统和程序代码。
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公开(公告)号：US20150147219A1
公开(公告)日：2015-05-28
申请号：US14570409
申请日：2014-12-15
Applicant: Cima NanoTech Israel Ltd.
Inventor： Arkady Garbar
CPC classification number: C25D1/003 , B22F5/10 , B82Y30/00 , C08K3/08 , C09D5/022 , C09D7/61 , C23C18/122 , C23C18/127 , C23C18/1295 , C25D1/00 , C25D1/006 , C25D1/08 , H05K1/0224 , H05K1/0253 , H05K3/207 , H05K9/009 , H05K2201/0257 , H05K2201/0347 , H05K2201/09681 , Y02P20/582 , Y10T428/256
Abstract: A micro-structured article is disclosed comprising a free-standing network of interconnected traces surrounding randomly-shaped cells wherein the interconnected traces comprise at least partially-joined nanoparticles. In a preferred embodiment, the nanoparticles comprise a conductive metal. The article is preferably formed by coating a nanoparticle-containing emulsion onto a substrate and drying the emulsion. The nanoparticles self-assemble into the network pattern which is subsequently removed from the substrate. A preferred method of removing the network from the substrate comprises the steps of electroplating the traces and subsequently exposing the traces to acid to release the network from the substrate.
Abstract translation: 公开了一种微结构制品，其包括围绕随机形状的细胞的互连轨迹的独立网络，其中互连轨迹包括至少部分接合的纳米颗粒。 在优选实施方案中，纳米颗粒包含导电金属。 该制品优选通过将含纳米颗粒的乳液涂覆在基材上并干燥乳液而形成。 纳米颗粒自组装成网状图案，其随后从基底去除。 从衬底去除网络的优选方法包括以下步骤：电镀迹线，随后将迹线暴露于酸以从衬底释放网络。
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公开(公告)号：US09005744B2
公开(公告)日：2015-04-14
申请号：US13751464
申请日：2013-01-28
Applicant: John Andrew Lebens , David Paul Trauernicht , Yongcai Wang , Ronald Steven Cok
Inventor： John Andrew Lebens , David Paul Trauernicht , Yongcai Wang , Ronald Steven Cok
IPC: B32B27/32 , G11B11/105 , H05K1/00 , H05K1/02
CPC classification number: H05K1/0296 , G06F3/044 , H05K1/02 , H05K1/0289 , H05K3/1258 , H05K2201/0108 , H05K2201/0376 , H05K2201/09227 , H05K2201/09272 , H05K2201/09681 , H05K2201/09727 , Y10T428/26
Abstract: A conductive micro-wire structure includes a substrate. A plurality of spaced-apart electrically connected micro-wires is formed on or in the substrate forming the conductive micro-wire structure. The conductive micro-wire structure has a transparency of less than 75% and greater than 0%.
Abstract translation: 导电微线结构包括衬底。 多个间隔开的电连接的微线形成在形成导电微线结构的衬底上或衬底中。 导电微线结构具有小于75％且大于0％的透明度。
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