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公开(公告)号：US20240164019A1
公开(公告)日：2024-05-16
申请号：US18124146
申请日：2023-03-21
Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Inventor： Woo Seok YANG , Seung Chul KIM
IPC: H05K1/11
CPC classification number: H05K1/113 , H05K2201/0347 , H05K2201/09827
Abstract: The present disclosure relates to a printed circuit board including a first insulating layer, a pad embedded in an upper portion of the first insulating and having an upper surface portion, a side surface portion, and a lower surface portion, where a portion of the upper surface portion and a portion of the side surface portion protrude from the upper surface of the first insulating layer, and a metal layer covering the portion of the upper surface portion, the portion of the side surface portion, and a portion of the lower surface portion of the pad.
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公开(公告)号：US20240164017A1
公开(公告)日：2024-05-16
申请号：US18504717
申请日：2023-11-08
Applicant: NITTO DENKO CORPORATION
Inventor： Hideki MATSUI , Naoki SHIBATA , Ryosuke SASAOKA
CPC classification number: H05K1/11 , H05K3/108 , H05K3/18 , H05K3/38 , H05K3/244 , H05K2201/0347 , H05K2201/099
Abstract: A wiring circuit board includes a first insulating layer, a conductive pattern disposed at one side of the first insulating layer in a thickness direction and having a terminal and a wire connected with the terminal, and a second insulating layer for suppressing release of the terminal from the first insulating layer. The second insulating layer has a first portion disposed at the one side of the first insulating layer in the thickness direction and a second portion disposed at one side of a peripheral edge portion of the terminal in the thickness direction and covering the peripheral edge portion.
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公开(公告)号：US20230262888A1
公开(公告)日：2023-08-17
申请号：US18303648
申请日：2023-04-20
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Hiromichi TANAKA
CPC classification number: H05K1/0298 , H05K3/4664 , H05K2201/0338 , H05K2201/0347 , H05K2201/09672
Abstract: A multilayer structure having a main surface includes: a first conductor extending in parallel with the main surface; a second conductor extending in parallel with the main surface and disposed at a different position from the first conductor with respect to a thickness direction of the multilayer structure; and a third conductor having a shape extending in at least any direction as seen in a direction perpendicular to the main surface. In a range higher than a lower end of the third conductor and lower than an upper end of the third conductor in the thickness direction of the multilayer structure, at least a part of the first conductor is included and at least a part of the second conductor is included.
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公开(公告)号：US11653455B2
公开(公告)日：2023-05-16
申请号：US17186868
申请日：2021-02-26
Applicant: NVIDIA CORPORATION
Inventor： Mingyi Yu , Gregory Patrick Bodi
IPC: H05K1/00 , H05K1/11 , H05K1/14 , H05K3/00 , H05K3/06 , H05K3/24 , H05K3/40 , H05K3/44 , H05K3/04
CPC classification number: H05K3/242 , H05K1/117 , H05K3/0047 , H05K3/043 , H05K2201/0347
Abstract: A method for forming a printed circuit board includes: forming on a substrate a first conductive layer for a first edge connector pin and a first conductive layer for a second edge connector pin, wherein the first conductive layer for the first edge connector pin and the first conductive layer for the second edge connector pin are electrically coupled to one another via a first conductive layer for an electrical bridging element; electroplating a second conductive layer onto both the first conductive layer for the first edge connector pin and the first conductive layer for the second edge connector pin via a plating current conductor; and removing at least a portion of the electrical bridging element to electrically separate the first edge connector pin from the second edge connector pin.
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公开(公告)号：US11647581B2
公开(公告)日：2023-05-09
申请号：US16903694
申请日：2020-06-17
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yuki Takemori
IPC: H05K1/11 , H05K1/03 , H05K3/28 , B32B3/26 , B32B15/04 , B32B3/30 , B32B9/00 , B32B9/04 , H05K1/02 , H05K3/34 , H05K3/46 , H05K3/24
CPC classification number: H05K1/0306 , B32B3/263 , B32B3/266 , B32B3/30 , B32B9/005 , B32B9/043 , B32B15/04 , H05K1/0271 , H05K1/113 , H05K3/285 , H05K3/34 , H05K3/4644 , H05K3/244 , H05K2201/017 , H05K2201/0195 , H05K2201/0347 , H05K2201/099 , H05K2201/0969 , H05K2201/09145 , H05K2201/09436 , H05K2201/09481 , H05K2201/09727 , H05K2201/09736 , H05K2201/09745 , H05K2203/1131 , Y10T428/12201 , Y10T428/12361 , Y10T428/24273 , Y10T428/24331
Abstract: A ceramic electronic component that includes an electronic component body having a superficial base ceramic layer; a surface electrode on a surface of the electronic component body, a peripheral section of the surface electrode having an opening therein; and a covering ceramic layer covering the peripheral section of the surface electrode and the opening therein.
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Patent Agency Ranking
公开(公告)号：US10021780B2
公开(公告)日：2018-07-10
申请号：US15800680
申请日：2017-11-01
Applicant: NITTO DENKO CORPORATION
Inventor： Daisuke Yamauchi , Hiroyuki Tanabe
CPC classification number: H05K1/028 , G11B5/484 , H05K1/056 , H05K3/064 , H05K3/18 , H05K3/243 , H05K2201/0191 , H05K2201/0347 , H05K2201/09736 , H05K2203/0353
Abstract: A wired circuit board includes an insulating layer and a conductive layer. The insulating layer continuously has a first insulating portion, a second insulating portion having a thickness smaller than that of the first insulating portion, and a third insulating portion disposed between the first insulating portion and the second insulating portion and having a thickness that gradually becomes smaller from the first insulating portion toward the second insulating portion. The conductive layer continuously has a first conductive portion disposed at one-side surface of the first insulating portion and a second conductive portion disposed at one-side surface of the second insulating portion and having a thickness smaller than that of the first conductive portion. The first conductive portion is disposed at one-side surface of the second insulating portion and the third insulating portion or is disposed at one-side surface of the first insulating portion and the third insulating portion.
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公开(公告)号：US09967976B2
公开(公告)日：2018-05-08
申请号：US15536851
申请日：2015-12-21
Inventor： Kazuhiro Miyata , Issei Okada , Takashi Kasuga , Yoshio Oka , Yasuhiro Okuda , Jinjoo Park , Hiroshi Ueda , Kousuke Miura
CPC classification number: H05K1/092 , C09D11/52 , H05K1/03 , H05K1/0346 , H05K1/09 , H05K1/097 , H05K3/022 , H05K3/064 , H05K3/102 , H05K3/1208 , H05K3/245 , H05K3/246 , H05K2201/0154 , H05K2201/0347 , H05K2203/072 , H05K2203/1131 , H05K2203/1157
Abstract: A substrate for a printed circuit board according to an embodiment of the present invention includes a base film having an insulating property, and a conductive layer formed on at least one of surfaces of the base film. In the substrate for a printed circuit board, at least the conductive layer contains titanium in a dispersed manner. The conductive layer preferably contains copper or a copper alloy as a main component. A mass ratio of titanium in the conductive layer is preferably 10 ppm or more and 1,000 ppm or less. The conductive layer is preferably formed by application and heating of a conductive ink containing metal particles. The conductive ink preferably contains titanium or a titanium ion. The metal particles are preferably obtained by a titanium redox process including reducing metal ions using trivalent titanium ions as a reducing agent in an aqueous solution by an action of the reducing agent.
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公开(公告)号：US09940957B2
公开(公告)日：2018-04-10
申请号：US15223241
申请日：2016-07-29
Applicant: Nitto Denko Corporation
Inventor： Daisuke Yamauchi , Hiroyuki Tanabe
CPC classification number: G11B5/4833 , G11B5/484 , H05K1/056 , H05K1/09 , H05K1/111 , H05K3/244 , H05K3/388 , H05K2201/0341 , H05K2201/0347 , H05K2201/05 , Y02P70/611
Abstract: A conductor trace is formed on a base insulating layer. The conductor trace includes two terminal portions and one wiring portion. The wiring portion is formed to connect the two terminal portions to each other and extend from each terminal portion. A metal cover layer is formed to cover the terminal portion and the wiring portion of the conductor trace and continuously extend from a surface of the terminal portion to a surface of the wiring portion. The metal cover layer is made of metal having magnetism lower than magnetism of nickel, and is made of gold, for example. A cover insulating layer is formed on the base insulating layer to cover a portion, of the metal cover layer formed on the conductor trace, covering the wiring portion and not to cover a portion of the metal cover layer covering the terminal portion.
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公开(公告)号：US20180007800A1
公开(公告)日：2018-01-04
申请号：US15514493
申请日：2015-09-30
Applicant: ZEON CORPORATION
Inventor： Natsuko SHINDOU , Shigeru FUJITA
IPC: H05K3/40 , H05K3/22 , H05K3/00 , C25D5/02 , B32B37/06 , C23C14/20 , C23C14/34 , B32B38/00 , B32B38/10 , H05K3/46 , C25D3/38 , B32B38/04
CPC classification number: H05K3/4038 , B32B15/08 , B32B37/06 , B32B37/26 , B32B38/0008 , B32B38/04 , B32B38/10 , B32B2037/268 , B32B2038/0076 , B32B2038/042 , B32B2038/168 , B32B2309/02 , B32B2309/04 , B32B2309/105 , B32B2309/12 , B32B2311/12 , B32B2457/08 , C23C14/205 , C23C14/34 , C23C18/1651 , C25D3/38 , C25D5/022 , C25D7/00 , H05K3/0032 , H05K3/005 , H05K3/22 , H05K3/4076 , H05K3/42 , H05K3/4644 , H05K2201/0347
Abstract: To provide a manufacturing method of a laminate body, including: a step of forming onto a supporting body a curable resin composition layer formed from a thermosetting resin composition to obtain a curable resin composition layer with a supporting body; a step of laminating the curable resin composition onto a substrate on a curable resin composition layer forming surface side to obtain a pre-cured composite with a supporting body formed from a substrate and a curable resin composition layer with a supporting body; a step of performing a first heating of the pre-cured composite and thermally curing the curable resin composition layer to obtain a cured composite with a supporting body formed from a substrate and a cured resin layer with a supporting body; a step of performing hole punching from the supporting body side of the cured composite with a supporting body to form a via hole in the cured resin layer; step of removing resin residue in the via hole of the cured composite with a supporting body; a step of peeling the supporting body from the cured composite with a supporting body to obtain a cured composite formed from a substrate and a cured resin layer, and a step of forming a dry plated conductor layer by dry plating on an inner wall surface of the via hole of the cured composite and on the cured resin layer.
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公开(公告)号：US20170347459A1
公开(公告)日：2017-11-30
申请号：US15536851
申请日：2015-12-21
Inventor： Kazuhiro MIYATA , Issei OKADA , Takashi KASUGA , Yoshio OKA , Yasuhiro OKUDA , Jinjoo PARK , Hiroshi UEDA , Kousuke MIURA
CPC classification number: H05K1/092 , C09D11/52 , H05K1/03 , H05K1/0346 , H05K1/09 , H05K1/097 , H05K3/022 , H05K3/064 , H05K3/102 , H05K3/1208 , H05K3/245 , H05K3/246 , H05K2201/0154 , H05K2201/0347 , H05K2203/072 , H05K2203/1131 , H05K2203/1157
Abstract: A substrate for a printed circuit board according to an embodiment of the present invention includes a base film having an insulating property, and a conductive layer formed on at least one of surfaces of the base film. In the substrate for a printed circuit board, at least the conductive layer contains titanium in a dispersed manner. The conductive layer preferably contains copper or a copper alloy as a main component. A mass ratio of titanium in the conductive layer is preferably 10 ppm or more and 1,000 ppm or less. The conductive layer is preferably formed by application and heating of a conductive ink containing metal particles. The conductive ink preferably contains titanium or a titanium ion. The metal particles are preferably obtained by a titanium redox process including reducing metal ions using trivalent titanium ions as a reducing agent in an aqueous solution by an action of the reducing agent.
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