公开(公告)号：US20070009751A1

公开(公告)日：2007-01-11

申请号：US11262788

申请日：2005-11-01

Applicant: Kuen-Yuan Hwang ,  An-Pang Tu ,  Sheng-Yen Wu ,  Yu-Lin Huang

Inventor： Kuen-Yuan Hwang ,  An-Pang Tu ,  Sheng-Yen Wu ,  Yu-Lin Huang

IPC: B32B27/00

CPC classification number: C08L79/08 ,  B32B27/281 ,  B82Y30/00 ,  C08J5/005 ,  C08J2379/08 ,  H05K1/0346 ,  H05K1/0373 ,  H05K2201/0154 ,  H05K2201/0209 ,  H05K2201/0245 ,  H05K2201/0257 ,  Y10T428/31721

Abstract: The present invention relates to a polyamic acid resin composition, which is characterized by containing nanolayer silica sheet and/or nanometer silica powder. The present invention also relates to a polyimide film prepared from the composition, the resultant film exhibits improved dimension stability, low water-absorbability, high transparency, and low Coefficient of Thermal Expansion (CTE) value and is suitable used in flexible print wiring board and wiring board for liquid crystal display (LCD).

Abstract translation: 本发明涉及聚酰胺酸树脂组合物，其特征在于含有纳米二氧化硅片和/或纳米二氧化硅粉末。 本发明还涉及由该组合物制备的聚酰亚胺膜，所得膜具有改进的尺寸稳定性，低吸水性，高透明度和低的热膨胀系数（CTE）值，并且适用于柔性印刷布线板和 液晶显示接线板（LCD）。

公开(公告)号：US20060254502A1

公开(公告)日：2006-11-16

申请号：US11280986

申请日：2005-11-16

Applicant: Philip Garrou ,  Michael Knapp ,  Hash Pakbaz ,  Florian Pschenitzka ,  Xina Quan ,  Michael Spaid

Inventor： Philip Garrou ,  Michael Knapp ,  Hash Pakbaz ,  Florian Pschenitzka ,  Xina Quan ,  Michael Spaid

IPC: C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14

CPC classification number: C23C18/1608 ,  B82Y10/00 ,  B82Y30/00 ,  C23C18/1639 ,  C23C18/1692 ,  C23C18/1879 ,  C23C18/1889 ,  C23C18/206 ,  C23C18/208 ,  C23C18/30 ,  G02F1/136204 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/105 ,  H05K3/12 ,  H05K3/389 ,  H05K2201/0209 ,  H05K2201/0257 ,  H05K2201/086 ,  H05K2203/0545 ,  H05K2203/122

Abstract: Improved methods and articles providing conformal coatings for a variety of devices including electronic, semiconductor, and liquid crystal display devices. Peptide formulations which bind to nanoparticles and substrates, including substrates with trenches and vias, to provide conformal coverage as a seed layer. The seed layer can be further enhanced with use of metallic films deposited on the seed layer. Seed layers can be characterized by AFM measurements and improved seed layers provide for better enhancement layers including lower resistivity in the enhancement layer. Peptides can be identified by phage display.

Abstract translation: 改进的方法和制品为包括电子，半导体和液晶显示装置的各种装置提供保形涂层。 结合纳米颗粒和底物的肽制剂，包括具有沟槽和通孔的底物，以提供作为种子层的保形覆盖。 通过使用沉积在种子层上的金属膜可进一步增强籽晶层。 可以通过AFM测量来表征种子层，并且改进的种子层提供包括增强层中较低电阻率的更好的增强层。 可以通过噬菌体展示来鉴定肽。

公开(公告)号：US20060226203A1

公开(公告)日：2006-10-12

申请号：US11096238

申请日：2005-03-31

Applicant: Daoqiang Lu ,  Tian-An Chen

Inventor： Daoqiang Lu ,  Tian-An Chen

IPC: B23K35/38 ,  B23K31/02

CPC classification number: H01L24/11 ,  B23K1/0016 ,  B23K35/22 ,  B23K35/38 ,  B23K2101/40 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H05K3/3484 ,  H05K3/3489 ,  H05K2201/0257 ,  H05K2203/0425 ,  H05K2203/043 ,  H05K2203/095 ,  H01L2924/00014

Abstract: A nano-sized solder suspension flows by selective wetting onto a bond pad and away from a bond-pad resist area. A microelectronic package is also disclosed that uses the nano-sized solder suspension. A method of assembling a microelectronic package is also disclosed. A computing system is also disclosed that includes a bump that was reflowed from the nano-sized solder suspension.

Abstract translation: 纳米尺寸的焊料悬浮液通过选择性润湿流动到接合焊盘上并远离焊垫抗蚀剂区域。 还公开了使用纳米尺寸的焊料悬浮液的微电子封装。 还公开了组装微电子封装的方法。 还公开了包括从纳米尺寸的焊料悬浮液回流的凸块的计算系统。

公开(公告)号：US20060210705A1

公开(公告)日：2006-09-21

申请号：US10556871

申请日：2004-05-13

Applicant: Daisuke Itoh ,  Akihito Izumitani ,  Noriaki Hata ,  Yorishige Matsuba

Inventor： Daisuke Itoh ,  Akihito Izumitani ,  Noriaki Hata ,  Yorishige Matsuba

IPC: C23C26/00 ,  B05D3/02

CPC classification number: H05K3/1283 ,  H01B1/22 ,  H05K3/102 ,  H05K3/105 ,  H05K2201/0257 ,  H05K2203/0315 ,  H05K2203/1131 ,  H05K2203/1157 ,  H05K2203/122

Abstract: The present invention provides a process for forming a copper fine particle sintered product type of a fine-shaped electric conductor showing superior electroconductivity, which comprises steps of drawing a fine pattern with the use of a dispersion containing the copper fine particles having a surface oxide film layer, conducting a treatment for reducing the copper fine particles with the surface oxide film layer or copper oxide fine particles included in the pattern at a comparatively low temperature, and baking the resultant copper fine particles. Specifically, the process carries out the processes of; applying a dispersion containing the copper fine particles having the surface oxide film layer thereon or the copper oxide fine particles with an average particle diameter of 10 μm or smaller onto a substrate; and then performing a series of the heat treatment steps of heating the particles in the coated layer at temperature of 350° C. or lower under an atmosphere containing a vapor and a gas of a compound having reducibility to reduce the oxide film by a reduction reaction which used the compound having reducibility as a reducing agent, subsequently repeating a heat treatment combining an oxidizing treatment of a short time with a re-reducing treatment, and sintering the resultant copper fine particles with each other to form a layer of the sintered product.

Abstract translation: 本发明提供一种形成具有优异导电性的细微型导电体的铜微粒烧结体型的方法，该方法包括以下步骤：利用含有表面氧化膜的铜微粒的分散体 在比较低的温度下进行包含在图案中的表面氧化膜层或氧化铜微粒的铜微粒的还原处理，并烘烤得到的铜微粒。 具体来说，该过程执行过程; 将其上具有表面氧化膜层的铜微粒或平均粒径为10μm以下的氧化铜微粒分散在基板上; 然后进行一系列的热处理步骤，在含有还原性的化合物的气体和气体的气氛下，在350℃或更低的温度下加热涂层中的颗粒，以通过还原反应来还原氧化膜 其使用具有还原性的化合物作为还原剂，随后重复进行短时间的氧化处理与再还原处理的热处理，并将所得铜微粒彼此烧结以形成烧结产品层。

公开(公告)号：US20060074164A1

公开(公告)日：2006-04-06

申请号：US11142515

申请日：2005-05-31

Applicant: Kirk Slenes ,  Dale Perry ,  Christopher Labanowski ,  Hope Perry ,  Erik Luther

Inventor： Kirk Slenes ,  Dale Perry ,  Christopher Labanowski ,  Hope Perry ,  Erik Luther

IPC: C08K3/22

CPC classification number: C08K3/34 ,  H01G4/206 ,  H01L28/40 ,  H05K1/162 ,  H05K2201/0209 ,  H05K2201/0257 ,  H05K2201/0269 ,  H05K2203/105

Abstract: The present invention provides a structured, nano-composite, dielectric film. The invention also provides a method for producing the thin composite film. The composite material comprises ceramic dielectric particles, preferably nano-sized particles, and a thermoset polymer system. The composite material exhibits a high energy density.

Abstract translation: 本发明提供一种结构化的纳米复合材料电介质膜。 本发明还提供一种薄复合膜的制造方法。 复合材料包括陶瓷电介质颗粒，优选纳米尺寸颗粒和热固性聚合物体系。 复合材料表现出高的能量密度。

公开(公告)号：US20060073337A1

公开(公告)日：2006-04-06

申请号：US10954476

申请日：2004-10-01

Applicant: Krzysztof Nauka ,  Chung Yang

Inventor： Krzysztof Nauka ,  Chung Yang

IPC: B05D5/12

CPC classification number: H01L21/288 ,  H01L21/76838 ,  H05K3/12 ,  H05K3/245 ,  H05K2201/0257 ,  H05K2201/0329 ,  H05K2201/035 ,  H05K2203/1476 ,  Y10T428/2998

Abstract: In a method of forming a conductive path on a substrate, a layer of metallic nanoparticles is printed on the substrate and a conductive organic material is also printed, such that the conductive organic material is interspersed with the layer of metallic nanoparticles to thereby enhance one or more electrical properties of the conductive path.

Abstract translation: 在基板上形成导电路径的方法中，将一层金属纳米颗粒印刷在基板上，并且还印刷导电有机材料，使得导电有机材料与金属纳米颗粒层分散，从而增强一个或多个 更多的导电路径的电性能。

公开(公告)号：US20050221605A1

公开(公告)日：2005-10-06

申请号：US10815291

申请日：2004-03-30

Applicant: Paul Koning ,  James Matayabas

Inventor： Paul Koning ,  James Matayabas

IPC: H01L23/498 ,  H05K1/03 ,  H05K3/28 ,  H05K3/46 ,  H01L21/44 ,  H01L21/4763

CPC classification number: H01L23/49894 ,  H01L2224/16 ,  H05K1/0373 ,  H05K3/285 ,  H05K3/4626 ,  H05K2201/0209 ,  H05K2201/0245 ,  H05K2201/0257

Abstract: This application discloses an apparatus comprising a substrate including a plurality of conducting layers and a nanocomposite inter-layer dielectric (ILD) sandwiched between the conducting layers, wherein the nanocomposite ILD layer comprises a nanocomposite including a polymer having a plurality of nanoclay particles dispersed therein, the nanoclay particles having a high aspect ratio. Also disclosed is an apparatus comprising a substrate having a contact surface and a nanocomposite solder resist layer placed on the contact surface, wherein the solder resist comprises a nanocomposite including a polymer binder having a plurality of nanoclay particles dispersed therein, the nanoclay particles having a high aspect ratio. Further disclosed is a process comprising providing a plurality of conducting layers and sandwiching a nanocomposite inter-layer dielectric (ILD) between the conducting layers, wherein the nanocomposite ILD layer comprises a nanocomposite including a polymer binder having a plurality of nanoclay particles dispersed therein, the nanoclay particles having a high aspect ratio. Other apparatus and process embodiments are also disclosed and claimed.

Abstract translation: 本申请公开了一种装置，包括：衬底，其包括多个导电层和夹在导电层之间的纳米复合层间电介质（ILD），其中所述纳米复合物ILD层包含纳米复合材料，所述纳米复合材料包括其中分散有多个纳米粘土颗粒的聚合物， 纳米粘土颗粒具有高纵横比。 还公开了一种装置，其包括具有接触表面的衬底和放置在接触表面上的纳米复合阻焊层，其中阻焊层包括纳米复合材料，其包括其中分散有多个纳米粘土颗粒的聚合物粘合剂，纳米粘土颗粒具有高的 长宽比。 进一步公开的方法包括提供多个导电层并在导电层之间夹住纳米复合层间电介质（ILD），其中纳米复合材料ILD层包括纳米复合材料，该纳米复合材料包括其中分散有多个纳米粘土颗粒的聚合物粘合剂， 具有高纵横比的纳米粘土颗粒。 还公开并要求保护其他装置和方法实施例。

公开(公告)号：US06730596B1

公开(公告)日：2004-05-04

申请号：US09868140

申请日：2001-06-15

Applicant: Akira Fukunaga ,  Kuniaki Horie ,  Naoaki Ogure ,  Takao Kato ,  Akihisa Hongo ,  Hiroshi Nagasawa

Inventor： Akira Fukunaga ,  Kuniaki Horie ,  Naoaki Ogure ,  Takao Kato ,  Akihisa Hongo ,  Hiroshi Nagasawa

IPC: H01L214763

CPC classification number: H05K3/4061 ,  B05C11/08 ,  C23C18/02 ,  C23C18/08 ,  H01L21/288 ,  H01L21/6715 ,  H01L21/76877 ,  H01L23/53238 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K3/045 ,  H05K3/102 ,  H05K2201/0257 ,  H01L2924/00

Abstract: The present invention relates particularly to a method of and an apparatus for forming a fine interconnection in a highly integrated circuit formed on a semiconductor substrate. The method has the steps of preparing a substrate having fine recesses formed in a surface thereof, dispersing ultrafine particles made at least partly of a metal in a predetermined solvent, producing an ultrafine particle dispersed liquid, supplying the ultrafine particle dispersed liquid to the fine recesses of the substrate, heating the substrate to melt and bond the metal, and chemical mechanical polishing the surface of the substrate to remove an excessively attached metal therefrom. According to the present invention, it is possible to stably deposit an interconnection metal of good quality using an inexpensive material.

Abstract translation: 本发明尤其涉及形成在半导体衬底上的高度集成电路中形成精细互连的方法和装置。 该方法具有如下步骤：制备在其表面形成有微细凹槽的基材，将至少部分由金属制成的超微粒子分散在预定溶剂中，制备超细颗粒分散液体，将超细颗粒分散液体供应到细小凹槽 加热衬底以熔融和粘合金属，并化学机械抛光衬底的表面以从中除去过量附着的金属。 根据本发明，可以使用便宜的材料稳定地沉积质量好的互连金属。

公开(公告)号：US20030006069A1

公开(公告)日：2003-01-09

申请号：US10173053

申请日：2002-06-18

Inventor： Toru Takebe ,  Yoshio Watanabe ,  Kentaro Fujii

IPC: H05K001/11 ,  H01R012/04 ,  H05K003/34 ,  H05K003/02

CPC classification number: H05K3/462 ,  H05K3/321 ,  H05K3/4069 ,  H05K3/423 ,  H05K3/4623 ,  H05K2201/0257 ,  H05K2201/0355 ,  H05K2203/063 ,  H05K2203/0733 ,  H05K2203/1461 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49156

Abstract: A conductive bond comprises conductive colloidal particles and a dispersant for dispersing the conductive colloidal particles. A multilayer printed circuit board includes a plurality of substrates, each having a conductive pattern on at least one face thereof. Any adjacent two of the substrates are separated by an insulating layer, and the conductive pattern of a first substrate of the two substrates faces the conductive pattern of a second substrate of the two substrate. The conductive pattern of a first substrate has one or more bumps for electrical connection to the second substrate. The bump and the conductive pattern of the second substrate are bonded to each other with the conductive bond applied to the tip of the bump.

Abstract translation: 导电键包括导电胶体颗粒和用于分散导电胶体颗粒的分散剂。 多层印刷电路板包括多个基板，每个基板在其至少一个面上具有导电图案。 任何相邻的两个基板被绝缘层分开，并且两个基板的第一基板的导电图案面对两个基板的第二基板的导电图案。 第一基板的导电图案具有用于与第二基板电连接的一个或多个凸块。 第二基板的凸起和导电图案通过施加到凸块的尖端的导电接合而彼此接合。

公开(公告)号：US06486413B1

公开(公告)日：2002-11-26

申请号：US09712199

申请日：2000-11-15

Applicant: Naoaki Ogure

Inventor： Naoaki Ogure

IPC: H01R909

CPC classification number: H05K3/108 ,  G02F1/13439 ,  H05K1/0393 ,  H05K3/102 ,  H05K3/38 ,  H05K2201/0108 ,  H05K2201/0257 ,  Y10T428/12014 ,  Y10T428/12028

Abstract: A substrate is coated with a conductive layer, which comprises a conductive layer of bonded ultrafine metal particles formed on the top surface thereof. The ultra fine metal particles have a diameter of 1-20 nm, and the substrate is of a flexible high polymer material. Since the conductive layer is formed by bonded layer of the ultrafine metal particles, an extremely thin layer having high conductivity can be formed. This structure enables the formation of a flexible printed circuit board with high-density interconnects or a transparent conductive film provided with both transparency and conductivity. Conventional vacuum equipments and complicated processes are not necessary for forming the conductive layer on the substrate.

Abstract translation: 基板涂覆有导电层，导电层包括在其顶表面上形成的结合的超细金属颗粒的导电层。 超细金属颗粒的直径为1-20nm，基材为柔性高分子材料。 由于导电层由超细金属颗粒的接合层形成，因此可以形成具有高导电性的极薄层。 这种结构使得能够形成具有高密度互连的柔性印刷电路板或者具有透明性和导电性的透明导电膜。 传统的真空设备和复杂的工艺对于在基板上形成导电层是不必要的。