公开(公告)号：US08643047B2

公开(公告)日：2014-02-04

申请号：US13414458

申请日：2012-03-07

Applicant: Kozo Uemura ,  Soichi Shibusawa ,  Yumiko Hayashida ,  Kiyoshi Nishimura ,  Seiko Kawashima ,  Tsuyoshi Oyaizu ,  Masahiro Ogata ,  Shuhei Matsuda ,  Hiroki Tamai

Inventor： Kozo Uemura ,  Soichi Shibusawa ,  Yumiko Hayashida ,  Kiyoshi Nishimura ,  Seiko Kawashima ,  Tsuyoshi Oyaizu ,  Masahiro Ogata ,  Shuhei Matsuda ,  Hiroki Tamai

IPC: H01L33/00

CPC classification number: H05K3/284 ,  F21S8/04 ,  F21V19/0055 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L33/56 ,  H01L33/60 ,  H01L2224/48091 ,  H01L2224/73265 ,  H05K1/0209 ,  H05K3/244 ,  H05K2201/0162 ,  H05K2201/099 ,  H05K2201/10106 ,  H05K2201/2054 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A light-emitting device includes a substrate, a reflecting layer formed on the substrate, a light-emitting element placed on the reflecting layer, and a sealing resin layer that covers the reflecting layer and the light-emitting element. The oxygen permeability of the sealing resin layer is equal to or lower than 1200 cm3/(m2·day·atm), and the ratio of the area of the reflecting layer covered by the sealing resin layer to the entire area on the resin substrate covered by the sealing resin layer is between 30% and 75% inclusive.

Abstract translation: 发光装置包括基板，形成在基板上的反射层，放置在反射层上的发光元件和覆盖反射层和发光元件的密封树脂层。 密封树脂层的透氧度等于或低于1200cm3 /（m2·day·atm），并且覆盖在树脂基板上的密封树脂层覆盖的反射层的面积与覆盖的整个面积的比率 通过密封树脂层在30％和75％之间。

公开(公告)号：US20140020936A1

公开(公告)日：2014-01-23

申请号：US13944715

申请日：2013-07-17

Applicant: Electronics and Telecommunications Research Institute

Inventor： Yong Hee KIM ,  Sang Don JUNG ,  Nam Seob BAEK ,  Gookhwa KIM

IPC: H05K1/02 ,  H05K3/10

CPC classification number: H05K1/02 ,  H05K3/10 ,  H05K3/4007 ,  H05K2201/0257 ,  H05K2201/099

Abstract: Provide are an electrode sensor and a method of fabricating the same. the method may include providing a substrate with a first electrode, forming a resist layer on the substrate to cover the first electrode, patterning the resist layer to expose a portion of the first electrode, forming an insulating layer on the substrate, removing the insulating layer on the resist layer and the resist layer to form a well in the insulating layer, and forming a second electrode in the well to be electrically connected to the first electrode. According to the method, it is possible to prevent the first electrode from being damaged. In addition, the second electrode may be configured have an increased surface area, and thus, the electrode can have low impedance.

Abstract translation: 提供电极传感器及其制造方法。 该方法可以包括提供具有第一电极的衬底，在衬底上形成抗蚀剂层以覆盖第一电极，图案化抗蚀剂层以暴露第一电极的一部分，在衬底上形成绝缘层，去除绝缘层 在所述抗蚀剂层和所述抗蚀剂层上，在所述绝缘层中形成阱，以及在所述阱中形成电连接到所述第一电极的第二电极。 根据该方法，可以防止第一电极被损坏。 此外，第二电极可以被配置为具有增加的表面积，因此电极可以具有低阻抗。

公开(公告)号：US20130341073A1

公开(公告)日：2013-12-26

申请号：US13864278

申请日：2013-04-17

Applicant: ZHEN DING TECHNOLOGY CO., LTD.

Inventor： CHE-WEI HSU ,  SHIH-PING HSU

IPC: H05K3/40 ,  H05K3/00 ,  H05K1/11

CPC classification number: H05K3/4038 ,  H01L21/486 ,  H01L23/5387 ,  H01L2924/0002 ,  H05K1/113 ,  H05K1/118 ,  H05K3/0094 ,  H05K3/243 ,  H05K2201/09481 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/0989 ,  H05K2201/099 ,  Y10T29/49165 ,  H01L2924/00

Abstract: A packaging substrate includes an insulating layer, a wiring layer and a solder mask. The insulating layer and the solder mask being arranged on two opposite sides of the wiring layer. The insulating layer defines a via hole. The wiring layer covers the via hole. The wiring layer includes a pad area. Two sides of the pad area are respectively exposed outside from the solder mask and in the via hole.

Abstract translation: 封装衬底包括绝缘层，布线层和焊接掩模。 绝缘层和焊料掩模布置在布线层的两个相对侧上。 绝缘层限定通孔。 布线层覆盖通孔。 布线层包括焊盘区域。 焊盘区域的两侧分别从焊接面罩和通孔露出。

公开(公告)号：US20130271177A1

公开(公告)日：2013-10-17

申请号：US13977565

申请日：2011-12-20

Applicant: Jens Nowotnick ,  Walter Wagenbrenner ,  Ulrich Warmbold ,  Matthias Lausmann ,  Sven Heinemann ,  Holger Gebhardt ,  Bernhard Klante

Inventor： Jens Nowotnick ,  Walter Wagenbrenner ,  Ulrich Warmbold ,  Matthias Lausmann ,  Sven Heinemann ,  Holger Gebhardt ,  Bernhard Klante

IPC: H05K1/02 ,  H05K3/10

CPC classification number: H05K1/0268 ,  H05K3/10 ,  H05K3/3452 ,  H05K3/4007 ,  H05K2201/099 ,  H05K2203/0415 ,  Y10T29/49155

Abstract: The invention relates to a printed circuit board (10), with conductor tracks (11, 11a), which are arranged at least on a surface of the printed circuit board (10) and serve for the electrical contacting of components, and with at least one testing zone (12), which is formed by a portion of the conductor track (11) and serves for the electrical contacting of a testing element (20), in particular a testing head, wherein the surface of the printed circuit board (10) is provided with a protective layer (14), which is formed in the testing zone (12) such that it is interrupted in the region of a contact zone (15), and wherein the contact zone (15) is provided with a layer (18), which establishes an electrical contacting of the testing element (20) with the layer (18). According to the invention, it is provided that the contact zone (15) is arranged at least partially at a lateral distance from the edges of the conductor track (11) in the region of the testing zone (12).

Abstract translation: 本发明涉及一种具有导体轨迹（11,11a）的印刷电路板（10），它们布置在至少在印刷电路板（10）的表面上并用于部件的电接触，并且至少与 一个测试区域（12），其由导体轨道（11）的一部分形成并且用于测试元件（20）的电接触，特别是测试头，其中印刷电路板（10）的表面 ）设置有保护层（14），其形成在测试区域（12）中，使得其在接触区域（15）的区域中断，并且其中接触区域（15）设置有层 （18），其建立所述测试元件（20）与所述层（18）的电接触。 根据本发明，提供了接触区域（15）至少部分地布置在距离测试区域（12）的区域中的导体轨道（11）的边缘的横向距离处。

公开(公告)号：US20130264105A1

公开(公告)日：2013-10-10

申请号：US13712385

申请日：2012-12-12

Applicant: SAN-EI-KAGAKU CO., LTD.

Inventor： Kazunori KITAMURA

IPC: H05K1/02 ,  H05K3/00 ,  H05K1/18

CPC classification number: H05K1/0296 ,  H01L23/49894 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2924/12042 ,  H05K1/181 ,  H05K3/00 ,  H05K3/305 ,  H05K3/3436 ,  H05K3/3442 ,  H05K3/3452 ,  H05K3/3484 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/0588 ,  Y02P70/613 ,  Y10T156/10 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

Abstract: The present invention provides a solder-mounted board which realizes reliable mounting of a component thereon; a method for producing the board; and a semiconductor device. The solder-mounted board includes a substrate; a wiring layer; a solder pad for mounting a component by the mediation of the solder; and an insulating layer which covers the wiring layer such that at least the solder pad is exposed, the wiring layer, the solder pad, and the insulating layer being provided on at least one surface of the substrate, wherein the insulating layer is formed of a first insulating layer provided on the substrate and the wiring layer, and a second insulating layer provided on at least a portion of the first insulating layer.

Abstract translation: 本发明提供了一种实现可靠地安装组件的焊接安装板， 一种生产该板的方法; 和半导体器件。 焊接安装板包括基板; 布线层; 用于通过焊料中介来安装部件的焊盘; 以及绝缘层，其覆盖所述布线层，使得至少所述焊盘露出，所述布线层，所述焊盘和所述绝缘层设置在所述基板的至少一个表面上，其中所述绝缘层由 设置在所述基板和所述布线层上的第一绝缘层，以及设置在所述第一绝缘层的至少一部分上的第二绝缘层。

公开(公告)号：US20130187988A1

公开(公告)日：2013-07-25

申请号：US13356964

申请日：2012-01-24

Applicant: Mario Joseph Ciminelli

Inventor： Mario Joseph Ciminelli

IPC: B41J2/14 ,  H05K1/09

CPC classification number: H05K3/282 ,  B41J2/14072 ,  B41J2002/14491 ,  H05K1/118 ,  H05K3/244 ,  H05K2201/099 ,  H05K2203/0574 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A flexible printed wiring member includes a flexible insulating base layer; a patterned copper layer disposed on the insulating base layer, the patterned copper layer including: a first portion including unplated copper leads; and a second portion including a plated metal layer disposed on the patterned copper layer; a first insulating cover layer disposed over the unplated copper leads in the first portion, the first insulating cover layer terminating at a first edge located proximate a boundary between the first portion and the second portion of the patterned copper layer; and a second insulating cover layer disposed over the first insulating cover layer, the second insulating cover layer terminating at a second edge located within the second portion of the patterned copper layer.

Abstract translation: 柔性印刷布线构件包括柔性绝缘基底层; 设置在绝缘基底层上的图案化铜层，所述图案化铜层包括：包括未镀覆铜引线的第一部分; 以及第二部分，包括设置在图案化铜层上的电镀金属层; 第一绝缘覆盖层，其设置在第一部分中的未镀覆铜引线之上，第一绝缘覆盖层终止于位于图案化铜层的第一部分和第二部分之间的边界附近的第一边缘处; 以及设置在所述第一绝缘覆盖层上的第二绝缘覆盖层，所述第二绝缘覆盖层终止于位于所述图案化铜层的第二部分内的第二边缘处。

公开(公告)号：US20130168132A1

公开(公告)日：2013-07-04

申请号：US13729666

申请日：2012-12-28

Applicant: SUMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Chang Bae Lee ,  Jin Gu Kim ,  Young Do Kweon

IPC: H05K3/00 ,  H05K1/11

CPC classification number: H05K3/00 ,  H05K1/111 ,  H05K1/113 ,  H05K3/244 ,  H05K3/26 ,  H05K3/282 ,  H05K2201/09745 ,  H05K2201/099 ,  H05K2203/095

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes a base substrate; a circuit layer including a connection pad having a vertically etched upper portion and formed on the upper portion of the base substrate; a solder resist layer formed on the upper portion of the base substrate and including an opening part exposing the connection pad; and a surface treatment layer formed on the upper portion of the connection pad exposed by the opening part.

Abstract translation: 这里公开了一种印刷电路板及其制造方法。 印刷电路板包括基底; 电路层，包括具有垂直蚀刻的上部并形成在所述基底基板的上部上的连接焊盘; 形成在所述基底基板的上部并且包括暴露所述连接垫的开口部的阻焊层; 以及形成在由开口部暴露的连接焊盘的上部的表面处理层。

公开(公告)号：US20130153946A1

公开(公告)日：2013-06-20

申请号：US13710648

申请日：2012-12-11

Applicant: Shinko Electric Industries Co., Ltd.

Inventor： Tatsuaki DENDA ,  Kazutaka Kobayashi

IPC: H01L33/60 ,  H01L21/50

CPC classification number: H01L33/60 ,  H01L21/50 ,  H01L2224/16245 ,  H01L2924/181 ,  H05K1/0203 ,  H05K1/0265 ,  H05K1/0274 ,  H05K1/111 ,  H05K2201/09409 ,  H05K2201/098 ,  H05K2201/099 ,  H05K2201/10106 ,  H05K2201/2054 ,  H01L2924/00012

Abstract: A light-emitting element mounting package includes a light-emitting element mounting portion that includes a plurality of wiring portions arranged interposing a predetermined gap between the wiring portions facing each other, and an insulating layer on which the light-emitting element mounting portion is mounted, wherein an upper surface of the light-emitting element mounting portion is exposed on the insulating layer, wherein cutout portions are formed on lower sides of side edges of the wiring portions and contact the insulating layer.

Abstract translation: 发光元件安装封装包括发光元件安装部分，该发光元件安装部分包括布置在彼此面对的布线部之间的预定间隙的多个布线部分和安装有发光元件安装部分的绝缘层 其中，所述发光元件安装部的上表面露出在所述绝缘层上，在所述布线部的侧缘的下侧形成有切口部，并与所述绝缘层接触。

公开(公告)号：US08466565B2

公开(公告)日：2013-06-18

申请号：US12729548

申请日：2010-03-23

Applicant: Hiromitsu Takeda

Inventor： Hiromitsu Takeda

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L31/00 ,  H01L21/44

CPC classification number: H05K1/111 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/16237 ,  H01L2224/81385 ,  H01L2924/00014 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2224/05599

Abstract: A substrate has a plurality of pads formed over one surface of a base, and an insulating film which is formed thereon and has a plurality of openings formed therein so as to expose each of the pads, wherein the openings of the insulating film are formed so that, in each pad formed at the corner of the base, among the plurality of pads, a first peripheral portion which composes a portion of the pad more closer to the corner and more distant away from the center of the base is covered by the insulating film, and so that a second peripheral portion which composes a portion of the pad more closer to the center as compared with the first peripheral portion is exposed in the opening.

Abstract translation: 衬底具有形成在基底的一个表面上的多个焊盘和形成在其上的绝缘膜，并且在其中形成有多个开口以暴露每个焊盘，其中绝缘膜的开口形成为 在形成在基座的角部的每个焊盘中，在多个焊盘之间，构成更靠近角部并且远离基座的中心更远离的焊盘的一部分的第一周边部分被绝缘体覆盖 膜，并且使得构成与第一周边部分相比更靠近中心的焊盘的一部分的第二周边部分暴露在开口中。

公开(公告)号：US08389871B2

公开(公告)日：2013-03-05

申请号：US13034792

申请日：2011-02-25

Applicant: Shinnosuke Maeda ,  Satoshi Hirano

Inventor： Shinnosuke Maeda ,  Satoshi Hirano

IPC: H05K1/11

CPC classification number: H05K3/4682 ,  H05K1/112 ,  H05K3/205 ,  H05K2201/094 ,  H05K2201/09472 ,  H05K2201/099 ,  Y10T29/49147

Abstract: A multilayered wiring board having a stack structure multilayered by alternately stacking a plurality of conductor layers and a plurality of resin insulation layers, wherein a solder resist is provided on at least one of a first main surface side and a second main surface side of the stack structure, a plurality of openings are formed in an outermost resin insulation layer that contacts with the solder resist, a plurality of the first main surface side connecting terminals or a plurality of the second main surface side connecting terminals being made of a copper layer as a main component and positioned in a plurality of the openings, terminal outer surfaces being positioned inwardly from an outer surface of the outermost resin insulation layer, and the solder resist extends into the plurality of openings and makes contact with an outer circumference portion of each of the terminal outer surfaces.

Abstract translation: 一种多层布线基板，其具有通过交替堆叠多个导体层和多个树脂绝缘层而叠层的叠层结构，其中在所述堆叠的第一主表面侧和第二主表面侧中的至少一个上设置阻焊剂 结构中，在与阻焊剂接触的最外层树脂绝缘层中形成多个开口，多个第一主表面侧连接端子或多个第二主表面侧连接端子由铜层制成， 主要部件并且定位在多个开口中，端子外表面从最外层树脂绝缘层的外表面向内定位，并且阻焊剂延伸到多个开口中并与每个的外周部分接触 端子外表面。