公开(公告)号：US06433993B1

公开(公告)日：2002-08-13

申请号：US09283100

申请日：1999-03-31

Applicant: Andrew T. Hunt ,  Wen-Yi Lin ,  Tzyy Jiuan Hwang ,  Michelle Hendrick ,  Helmut G. Hornis

Inventor： Andrew T. Hunt ,  Wen-Yi Lin ,  Tzyy Jiuan Hwang ,  Michelle Hendrick ,  Helmut G. Hornis

IPC: H01G4005

CPC classification number: H01G4/085 ,  H05K1/162 ,  H05K3/388 ,  H05K3/467 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2201/09309

Abstract: Thin layer capacitors are formed from a first flexible metal layer, a dielectric layer between about 0.03 and about 2 microns deposited thereon, and a second flexible metal layer deposited on the dielectric layer. The first flexible metal layer may either be a metal foil, such as a copper, aluminum, or nickel foil, or a metal layer deposited on a polymeric support sheet. Depositions of the layers is by or is facilitate by combustion chemical vapor deposition or controlled atmosphere chemical vapor deposition.

公开(公告)号：US20020098448A1

公开(公告)日：2002-07-25

申请号：US10035400

申请日：2001-10-26

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Koji Yoshida ,  Makoto Tose

IPC: G03F007/00

CPC classification number: H05K3/28 ,  H05K3/0023 ,  H05K3/0041 ,  H05K2201/0317 ,  H05K2203/0577 ,  H05K2203/0585 ,  H05K2203/1476

Abstract: The present invention provides a thin film circuit board used as a milli-wave or micro-wave module, in which a patterned insulating film having a sufficient thickness can be stably formed. Such an insulating film is produced by the step of forming a conductor film in a predetermined pattern on a cleaned substrate and forming an insulating film on the substrate to cover the conductor film, the step of patterning the insulating film, the step of forming a second insulating film, and the step of patterning the insulating film. In this way, the insulating film forming step and the patterning step are repeated a required number of times.

Abstract translation: 本发明提供了一种用作微波或微波模块的薄膜电路板，其中可以稳定地形成具有足够厚度的图案化绝缘膜。 这种绝缘膜是通过在清洁的基板上形成预定图案的导体膜并在基板上形成绝缘膜以覆盖导体膜的步骤，图案化绝缘膜的步骤，形成第二个 绝缘膜，以及图案化绝缘膜的步骤。 以这种方式，将绝缘膜形成步骤和图案化步骤重复所需的次数。

公开(公告)号：US20020064029A1

公开(公告)日：2002-05-30

申请号：US09725643

申请日：2000-11-29

Applicant: Nokia Mobile Phones Ltd.

Inventor： Helena Pohjonen

IPC: H05K007/20

CPC classification number: H05K1/0207 ,  H01L23/3677 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0206 ,  H05K1/141 ,  H05K1/16 ,  H05K3/445 ,  H05K3/4641 ,  H05K2201/0317 ,  H05K2201/09563 ,  H01L2924/00

Abstract: Stacked substrates using passive integration components formed in silicon or stainless steel substrates interconnect with active elements mounted on the surface of the substrate to form a miniaturized power amplification module. Metal filled vias pass through the layers and carry electrical signals to and from the active elements and passive components. The metal filled vias function as thermal transfer heat sinks to transfer heat away from the active elements and the module.

Abstract translation: 使用在硅或不锈钢衬底中形成的无源集成元件的堆叠衬底与安装在衬底表面上的有源元件互连以形成小型化的功率放大模块。 金属填充的通孔穿过层并将电信号传送到有源元件和无源元件。 金属填充的通孔用作热转印散热器，以将热量从有源元件和模块传送出去。

公开(公告)号：US06388230B1

公开(公告)日：2002-05-14

申请号：US09418207

申请日：1999-10-13

Applicant: Wayne E. Nacker ,  Richard W. Carpenter

Inventor： Wayne E. Nacker ,  Richard W. Carpenter

IPC: B23K2600

CPC classification number: H05K1/167 ,  H01L21/4846 ,  H05K1/0306 ,  H05K1/162 ,  H05K3/027 ,  H05K3/20 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2203/0338

Abstract: To form thin film electrical components, a thin film having desired electrical properties is deposited on a substrate of dissimilar material. Thermal energy from a computer guided laser is used to remove selected portions of the thin film. In accordance with one aspect of the invention, the thin film is an electrically conducting material, such as platinum or doped platinum, and the substrate is metal foil, such as copper foil. The thermal energy from the laser ablates away portions of the thin film. In accordance with another aspect of the invention, a layer of zero valence metal is deposited on a dielectric material substrate which has a melting point or decomposition temperature substantially above that of the zero valence metal. The zero valence metal layer is patterned to form electronic circuitry components by computer guided laser which provides sufficient thermal energy to boil away selected portions of the zero valence metal layer. In one preferred embodiment, electronic circuitry is formed from a three-layer composite comprising nickel foil; a dielectric material, such as silica deposited on the foil; and a zinc layer deposited on the dielectric material. The zinc layer, having a boiling point substantially below the melting points of the dielectric material and the nickel foil, is patterned by laser-derived thermal energy.

Abstract translation: 为了形成薄膜电气部件，具有期望的电性能的薄膜沉积在不同材料的基板上。 使用来自计算机引导激光器的热能来去除所选择的薄膜部分。 根据本发明的一个方面，薄膜是诸如铂或掺杂铂的导电材料，并且衬底是诸如铜箔的金属箔。 来自激光器的热能消除了薄膜的部分。 根据本发明的另一方面，一种零价金属层沉积在电介质材料基底上，其熔点或分解温度基本上高于零价金属的熔点或分解温度。 零价金属层被图案化以通过计算机引导激光器形成电子电路部件，该激光器提供足够的热能来去除零价金属层的选定部分。 在一个优选实施例中，电子电路由包括镍箔的三层复合材料形成; 介电材料，例如沉积在箔上的二氧化硅; 以及沉积在电介质材料上的锌层。 具有基本上低于介电材料和镍箔的熔点的沸点的锌层通过激光衍生的热能被图案化。

公开(公告)号：US20020045346A1

公开(公告)日：2002-04-18

申请号：US09187363

申请日：1998-11-06

Inventor： JERRY ZIMMER ,  DANIEL A. WORSHAM

IPC: H01L021/302 ,  H01L021/461

CPC classification number: H01L21/32139 ,  H01L23/49877 ,  H01L2924/0002 ,  H05K1/09 ,  H05K3/325 ,  H05K2201/0317 ,  H05K2201/0323 ,  H05K2201/0326 ,  Y10S438/964 ,  H01L2924/00

Abstract: Conductive diamond film regions on a substrate for establishing electrical contact with a surface mount semiconductor package, or the like, is formed by heating the substrate base in a diamond film gas phase deposition reactor, then introducing molecular hydrogen, a carbon bearing gas, and a dopant source into the reactor at a temperature sufficient to produce a conductive polycrystalline diamond layer. Then the polycrystalline diamond layer is etched down to the substrate base in regions where no contact will exist with the surface mount packages to define a desired pattern of conductive polycrystalline diamond in regions of the packages where electrical contact is desired. The substrate is then brought into pressure contact with a surface mount semiconductor package, or the like.

Abstract translation: 通过在金刚石薄膜气相沉积反应器中加热衬底基底，然后引入分子氢，含碳气体和/或碳纳米管，形成用于与表面安装半导体封装等建立电接触的基板上的导电金刚石膜区域 掺杂剂源在足以产生导电多晶金刚石层的温度下进入反应器。 然后，多晶金刚石层在与表面安装封装不存在接触的区域中向下蚀刻到基板基底，以在需要电接触的封装的区域中限定导电多晶金刚石的期望图案。 然后将衬底与表面贴装半导体封装等压力接触。

公开(公告)号：US06248401B1

公开(公告)日：2001-06-19

申请号：US08846080

申请日：1997-04-25

Applicant: Shiuh-Kao Chiang ,  Mary K. Prokop ,  Tibor Kalnoki-Kis

Inventor： Shiuh-Kao Chiang ,  Mary K. Prokop ,  Tibor Kalnoki-Kis

IPC: C23C1606

CPC classification number: C23C14/5806 ,  C23C14/024 ,  C23C14/16 ,  C23C14/58 ,  C23C28/00 ,  H05K1/09 ,  H05K3/022 ,  H05K3/386 ,  H05K3/388 ,  H05K3/389 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2203/0278 ,  Y10T428/12431 ,  Y10T428/12493 ,  Y10T428/12569 ,  Y10T428/12611

Abstract: This invention relates to a metal body having at least one vapor-deposited treatment layer overlying and adhered to at least one side of the metal body, and a layer of adhesion-promoting material overlying and adhered to at least one treatment layer, provided that when two treatment layers are deposited on one side of the body and the first layer is vapor-deposited zinc, the second layer is not vapor-deposited silica or alumina, said adhesion-promoting material being suitable for enhancing adhesion between said body and another substrate. The invention also relates to laminates comprising metal foils and at least one vapor-deposited treatment layer overlying and adhered to at least one side of the metal foil; a layer of adhesion-promoting material overlying and adhered to at least one vapor-deposited treatment layer; and a layer of an electrically non-conductive material overlying and adhered to the adhesion-promoting layer.

Abstract translation: 本发明涉及一种具有至少一个气相沉积处理层的金属体，该处理层覆盖并粘附到金属体的至少一侧，以及一层粘附促进材料层，其覆盖并粘附至至少一个处理层，条件是当 两个处理层沉积在主体的一侧上，第一层是气相沉积的锌，第二层不是气相沉积的二氧化硅或氧化铝，所述粘附促进材料适于增强所述主体和另一基板之间的粘附。 本发明还涉及包含金属箔和覆盖并粘附在金属箔的至少一侧上的至少一个气相沉积处理层的层压体; 一层粘附促进材料，覆盖并粘附在至少一个气相沉积处理层上; 以及覆盖并粘合到粘附促进层上的非导电材料层。

公开(公告)号：US06221176B1

公开(公告)日：2001-04-24

申请号：US09271640

申请日：1999-03-17

Applicant: Harish D. Merchant ,  Charles A. Poutasse ,  Chin-Ho Lee

Inventor： Harish D. Merchant ,  Charles A. Poutasse ,  Chin-Ho Lee

IPC: C23C2224

CPC classification number: B32B15/08 ,  B32B15/20 ,  B32B2311/12 ,  B32B2457/08 ,  H05K1/028 ,  H05K3/384 ,  H05K3/385 ,  H05K3/388 ,  H05K3/389 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2203/0315 ,  H05K2203/0723

Abstract: In one embodiment, the present invention relates to a flexible laminate, comprising a first flexible polymeric film; a copper layer having a microcracking prevention layer on at least one side the microcracking prevention layer sufficient to prevent microcracks in a copper layer having a thickness of up to about 18 &mgr;m during at least 50,000,000 bending cycles and/or a copper layer having a thickness of up to about 35 &mgr;m during at least 20,000,000 bending cycles of the flexible laminate; and a second flexible polymeric film.

Abstract translation: 在一个实施例中，本发明涉及柔性层压板，包括第一柔性聚合物膜; 在至少一侧具有防微裂纹层的铜层，所述显微裂纹防止层足以防止在至少50,000,000次弯曲循环期间具有高达约18μm厚度的铜层中的微裂纹，和/或厚度为 在柔性层压板的至少20,000,000次弯曲循环期间高达约35μm; 和第二柔性聚合物膜。

公开(公告)号：US06210592B1

公开(公告)日：2001-04-03

申请号：US09069679

申请日：1998-04-29

Applicant: Andrew T. Hunt ,  Wen-Yi Lin ,  Shara S. Shoup ,  Richard W. Carpenter

Inventor： Andrew T. Hunt ,  Wen-Yi Lin ,  Shara S. Shoup ,  Richard W. Carpenter

IPC: H01C112

CPC classification number: H01L28/20 ,  C23C16/40 ,  C23C16/453 ,  H01C7/006 ,  H01C17/20 ,  H01C17/2416 ,  H05K1/167 ,  H05K3/064 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2203/0338 ,  H05K2203/1338

Abstract: Resistors are formed by selective etching from layered thin film material comprising an insulating substrate, a resistive material which is a mixture of a zero valence metal and a dielectric material, and a layer of conductive material.

Abstract translation: 电阻器通过从分层薄膜材料的选择性蚀刻形成，该材料包括绝缘衬底，作为零价金属和电介质材料的混合物的电阻材料和导电材料层。

公开(公告)号：US06207522B1

公开(公告)日：2001-03-27

申请号：US09198285

申请日：1998-11-23

Applicant: Andrew T. Hunt ,  Tzyy Jiuan Hwang ,  Helmut G. Hornis ,  Wen-Yi Lin

Inventor： Andrew T. Hunt ,  Tzyy Jiuan Hwang ,  Helmut G. Hornis ,  Wen-Yi Lin

IPC: H01L2120

CPC classification number: H05K1/162 ,  H01G4/085 ,  H05K3/388 ,  H05K3/467 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2201/09309

Abstract: Thin layer capacitors are formed from a first flexible metal layer, a dielectric layer between about 0.03 and about 2 microns deposited thereon, and a second flexible metal layer deposited on the dielectric layer. The first flexible metal layer may either be a metal foil, such as a copper, aluminum, or nickel foil, or a metal layer deposited on a polymeric support sheet. Depositions of the layers is by or is facilitate by combustion chemical vapor deposition or controlled atmosphere chemical vapor deposition.

Abstract translation: 薄层电容器由第一柔性金属层，沉积在其上的约0.03和约2微米之间的电介质层和沉积在电介质层上的第二柔性金属层形成。 第一柔性金属层可以是金属箔，例如铜，铝或镍箔，或者沉积在聚合物支撑片上的金属层。 通过燃烧化学气相沉积或受控气氛化学气相沉积，这些层的沉积是或通过其促进的。

公开(公告)号：US06194990B1

公开(公告)日：2001-02-27

申请号：US09268956

申请日：1999-03-16

Applicant: Tien Lee ,  Lawrence Lach ,  Gregory J. Dunn

Inventor： Tien Lee ,  Lawrence Lach ,  Gregory J. Dunn

IPC: H01C101

CPC classification number: H05K1/167 ,  H05K3/0023 ,  H05K3/4644 ,  H05K2201/0187 ,  H05K2201/0317 ,  H05K2201/09509 ,  H05K2201/09672 ,  H05K2201/09845 ,  H05K2201/10045 ,  H05K2203/0361 ,  Y10T29/49082

Abstract: A thin-film metal resistor (44) suitable for a multilayer printed circuit board (12), and a method for its fabrication. The resistor (44) generally has a multilayer construction, with the individual layers (34, 38) of the resistor (44) being self-aligned with each other so that a negative mutual inductance is produced that very nearly cancels out the self-inductance of each resistor layer (34, 38). As a result, the resistor (44) has a very low net parasitic inductance. In addition, the multilayer construction of the resistor (44) reduces the area of the circuit board (12) required to accommodate the resistor (44), and as a result reduces the problem of parasitic interactions with other circuit elements on other layers of the circuit board (12).

Abstract translation: 适用于多层印刷电路板（12）的薄膜金属电阻（44）及其制造方法。 电阻器（44）通常具有多层结构，其中电阻器（44）的各个层（34,38）彼此自对准，使得产生负的互感，其几乎抵消了自感 的每个电阻层（34,38）。 结果，电阻器（44）具有非常低的净寄生电感。 此外，电阻器（44）的多层结构减小了容纳电阻器（44）所需的电路板（12）的面积，结果减少了与其他层上的其它电路元件的寄生相互作用的问题 电路板（12）。