公开(公告)号：US20240237201A1

公开(公告)日：2024-07-11

申请号：US18617671

申请日：2024-03-27

Applicant: IBIDEN CO., LTD.

Inventor： Susumu KAGOHASHI ,  Maaya TOMIDA

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0296 ,  H05K1/115 ,  H05K2201/0175

Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer and including a signal wiring, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer. The resin insulating layer has an opening such that the opening is exposing a portion of the first conductor layer and that the via conductor is formed in the opening of the resin insulating layer, and the resin insulating layer includes inorganic particles and resin such that the resin is forming the surface of the resin insulating layer.

公开(公告)号：US12022622B2

公开(公告)日：2024-06-25

申请号：US16166204

申请日：2018-10-22

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yuki Takemori

IPC: H05K3/38 ,  H05K1/09 ,  H05K3/34 ,  H05K3/46 ,  H05K1/02 ,  H05K1/03 ,  H05K3/40

CPC classification number: H05K3/38 ,  H05K1/09 ,  H05K3/34 ,  H05K3/388 ,  H05K3/4644 ,  B32B2305/80 ,  B32B2457/08 ,  H05K1/0271 ,  H05K1/0306 ,  H05K3/4007 ,  H05K2201/0175 ,  H05K2201/0195 ,  H05K2201/0338

Abstract: A ceramic electronic component that includes an electronic component body having a superficial base ceramic layer and a surface electrode on a surface of the electronic component body. The surface electrode includes a first sintered layer on the base ceramic layer, a second sintered layer on the first sintered layer, and a plating layer on the second sintered layer. A peripheral section of the first sintered layer has an exposed surface which is not overlaid with the second sintered layer or the plating layer.

公开(公告)号：US11729909B2

公开(公告)日：2023-08-15

申请号：US17380443

申请日：2021-07-20

Applicant: Honeywell Federal Manufacturing & Technologies, LLC

Inventor： Thomas Matthew Selter ,  Justin Schlitzer ,  Surbhi Mahajan Du

IPC: H05K1/03 ,  H05K3/00 ,  H05K1/05 ,  C23C14/22 ,  C23C14/16 ,  C23C16/02 ,  C23C14/06 ,  H05K3/28 ,  C23C16/27

CPC classification number: H05K1/053 ,  C23C14/0611 ,  C23C14/16 ,  C23C14/221 ,  C23C16/0272 ,  C23C16/276 ,  H05K1/032 ,  H05K1/0306 ,  H05K3/0044 ,  H05K3/285 ,  H05K2201/0175

Abstract: A multi-layer coating on an outer surface of a substrate includes a first layer applied directly to the outer surface of the substrate. The first layer includes diamond-like carbon (DLC) configured to mitigate metal whisker formation. A second layer is applied on a top surface of the first layer. The second layer is a conformal coating that includes a second material configured to bind to the top surface of the first layer and fill any microfractures that may form in the first layer. Optionally, a third layer is applied on a top surface of the second layer and includes DLC configured to protect the second layer from oxidation and degradation.

公开(公告)号：US11653447B2

公开(公告)日：2023-05-16

申请号：US17546583

申请日：2021-12-09

Applicant: KABUSHIKI KAISHA TOSHIBA ,  TOSHIBA MATERIALS CO., LTD.

Inventor： Hiromasa Kato ,  Takashi Sano

IPC: H05K1/03 ,  H05K1/09 ,  H05K3/20 ,  H05K3/06

CPC classification number: H05K1/09 ,  H05K1/0306 ,  H05K3/061 ,  H05K3/20 ,  H05K2201/0175

Abstract: A ceramic copper circuit board according to an embodiment includes a ceramic substrate and a first copper part. The first copper part is bonded at a first surface of the ceramic substrate via a first brazing material part. The thickness of the first copper part is 0.6 mm or more. The side surface of the first copper part includes a first sloped portion. The width of the first sloped portion is not more than 0.5 times the thickness of the first copper part. The first brazing material part includes a first jutting portion jutting from the end portion of the first sloped portion. The length of the first jutting portion is not less than 0 μm and not more than 200 μm. The contact angle between the first jutting portion and the first sloped portion is 65° or less.

公开(公告)号：US20190191556A1

公开(公告)日：2019-06-20

申请号：US16197338

申请日：2018-11-20

Applicant: WEN YAO CHANG

Inventor： WEN YAO CHANG

IPC: H05K1/03 ,  H05K1/09 ,  H05K3/12 ,  H05K3/22 ,  H05K3/30 ,  H05K1/18 ,  H05K3/06

CPC classification number: H05K1/0306 ,  H05K1/09 ,  H05K1/185 ,  H05K3/067 ,  H05K3/1216 ,  H05K3/22 ,  H05K3/30 ,  H05K2201/0175 ,  H05K2203/0502 ,  H05K2203/0756 ,  Y10T29/49155

Abstract: A circuit board with a substrate made of silicon comprises a silicon substrate made of silicon; an adhering layer which is a gluing layer and is adhered on the silicon substrate; a metal layer formed as a metal plate layer or a metal circuit layer; the metal layer being adhered on the adhering layer; and wherein the metal layer is etched to form with metal circuits. Furthermore, electronic elements are adhered on the metal layer to form as circuits with specific functions. A packaging silicon layer encapsulates the metal layer and the electronic elements for packaging. The circuit board is a flat plate board or a curled board.

公开(公告)号：US20180213652A1

公开(公告)日：2018-07-26

申请号：US15880204

申请日：2018-01-25

Applicant: Vacuumschmelze GmbH & Co. KG

Inventor： Harald HUNDT

IPC: H05K3/28 ,  H05K1/18 ,  H05K1/02

CPC classification number: H05K3/284 ,  H05K1/0213 ,  H05K1/181 ,  H05K3/282 ,  H05K2201/0129 ,  H05K2201/0158 ,  H05K2201/0175 ,  H05K2203/1355 ,  H05K2203/1377

Abstract: Electrically isolating an electrical or electronic assembly having a carrier and one or more electrical or electronic components mechanically and electrically connected with the carrier, includes coating the carrier or at least one of the components or both entirely or partially with powder. The powder includes powder particles of electrically isolating material that have an average particle diameter of less than 1000 micrometers.

公开(公告)号：US09781325B1

公开(公告)日：2017-10-03

申请号：US15473573

申请日：2017-03-29

Applicant: NINGBO SUNNY OPOTECH CO., LTD.

Inventor： Mingzhu Wang ,  Bojie Zhao ,  Takehiko Tanaka ,  Nan Guo ,  Zhenyu Chen ,  Heng Jiang ,  Zhongyu Luan ,  Fengsheng Xi ,  Feifan Chen ,  Liang Ding

IPC: H04N5/225 ,  G02B3/00 ,  H05K1/18

CPC classification number: H04N5/2257 ,  G02B3/0075 ,  G02B5/201 ,  G02B7/006 ,  G02B7/021 ,  H01L27/14625 ,  H04M1/0264 ,  H04N5/2252 ,  H04N5/2253 ,  H04N5/2254 ,  H04N5/2258 ,  H05K1/0203 ,  H05K1/0274 ,  H05K1/183 ,  H05K1/185 ,  H05K1/189 ,  H05K2201/0141 ,  H05K2201/0158 ,  H05K2201/0175 ,  H05K2201/09036 ,  H05K2201/10121

Abstract: An array imaging module includes a molded photosensitive assembly which includes a supporting member, at least a circuit board, at least two photosensitive units, at least two lead wires, and a mold sealer. The photosensitive units are coupled at the chip coupling area of the circuit board. The lead wires are electrically connected the photosensitive units at the chip coupling area of the circuit board. The mold sealer includes a main mold body and has two optical windows. When the main mold body is formed, the lead wires, the circuit board and the photosensitive units are sealed and molded by the main mold body of the mold sealer, such that after the main mold body is formed, the main mold body and at least a portion of the circuit board are integrally formed together at a position that the photosensitive units are aligned with the optical windows respectively.

公开(公告)号：US20170264802A1

公开(公告)日：2017-09-14

申请号：US15473605

申请日：2017-03-30

Applicant: NINGBO SUNNY OPOTECH CO., LTD.

Inventor： Mingzhu WANG ,  Bojie ZHAO ,  Takehiko TANAKA ,  Nan GUO ,  Zhenyu CHEN ,  Heng JIANG ,  Zhongyu LUAN ,  Fengsheng XI ,  Feifan CHEN ,  Liang DING

IPC: H04N5/225 ,  H05K1/02 ,  H05K1/18 ,  G02B3/00 ,  G02B7/00

CPC classification number: H04N5/2257 ,  G02B3/0075 ,  G02B5/201 ,  G02B7/006 ,  G02B7/021 ,  H01L27/14625 ,  H04M1/0264 ,  H04N5/2252 ,  H04N5/2253 ,  H04N5/2254 ,  H04N5/2258 ,  H05K1/0203 ,  H05K1/0274 ,  H05K1/183 ,  H05K1/185 ,  H05K1/189 ,  H05K2201/0141 ,  H05K2201/0158 ,  H05K2201/0175 ,  H05K2201/09036 ,  H05K2201/10121

Abstract: An array imaging module includes a molded photosensitive assembly which includes a supporting member, at least a circuit board, at least two photosensitive units, at least two lead wires, and a mold sealer. The photosensitive units are coupled at the chip coupling area of the circuit board. The lead wires are electrically connected the photosensitive units at the chip coupling area of the circuit board. The mold sealer includes a main mold body and has two optical windows. When the main mold body is formed, the lead wires, the circuit board and the photosensitive units are sealed and molded by the main mold body of the mold sealer, such that after the main mold body is formed, the main mold body and at least a portion of the circuit board are integrally formed together at a position that the photosensitive units are aligned with the optical windows respectively.

公开(公告)号：US20170264801A1

公开(公告)日：2017-09-14

申请号：US15473573

申请日：2017-03-29

Applicant: NINGBO SUNNY OPOTECH CO., LTD.

Inventor： Mingzhu WANG ,  Bojie ZHAO ,  Takehiko TANAKA ,  Nan GUO ,  Zhenyu CHEN ,  Heng JIANG ,  Zhongyu LUAN ,  Fengsheng XI ,  Feifan CHEN ,  Liang DING

IPC: H04N5/225 ,  H05K1/18 ,  G02B3/00

CPC classification number: H04N5/2257 ,  G02B3/0075 ,  G02B5/201 ,  G02B7/006 ,  G02B7/021 ,  H01L27/14625 ,  H04M1/0264 ,  H04N5/2252 ,  H04N5/2253 ,  H04N5/2254 ,  H04N5/2258 ,  H05K1/0203 ,  H05K1/0274 ,  H05K1/183 ,  H05K1/185 ,  H05K1/189 ,  H05K2201/0141 ,  H05K2201/0158 ,  H05K2201/0175 ,  H05K2201/09036 ,  H05K2201/10121

Abstract: An array imaging module includes a molded photosensitive assembly which includes a supporting member, at least a circuit board, at least two photosensitive units, at least two lead wires, and a mold sealer. The photosensitive units are coupled at the chip coupling area of the circuit board. The lead wires are electrically connected the photosensitive units at the chip coupling area of the circuit board. The mold sealer includes a main mold body and has two optical windows. When the main mold body is formed, the lead wires, the circuit board and the photosensitive units are sealed and molded by the main mold body of the mold sealer, such that after the main mold body is formed, the main mold body and at least a portion of the circuit board are integrally formed together at a position that the photosensitive units are aligned with the optical windows respectively.

公开(公告)号：US20170142830A1

公开(公告)日：2017-05-18

申请号：US15127725

申请日：2015-03-20

Applicant: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft

Inventor： Elisabeth Kreutzwiesner ,  Gernot Schulz

IPC: H05K1/03 ,  H05K1/09 ,  H05K1/18 ,  H05K3/28 ,  H01B3/48 ,  H05K1/02

CPC classification number: H05K1/0366 ,  H01B3/084 ,  H01B3/48 ,  H01B3/485 ,  H01B3/52 ,  H05K1/0203 ,  H05K1/0209 ,  H05K1/09 ,  H05K1/185 ,  H05K3/28 ,  H05K2201/0175 ,  H05K2201/029 ,  H05K2201/0323

Abstract: Electronic device comprising an at least partially electrically insulating carrier structure, which comprises a resin matrix and reinforcement structures in the resin matrix, wherein the reinforcement structures are provided at least partially with a thermal conductivity increasing coating, and an electrically conducting structure at and/or in the carrier structure, wherein at least in an interconnecting section between the carrier structure and the electrically conducting structure, the carrier structure is free from reinforcement structures provided with the coating, such that the electrically conducting structure and the coating are arranged non-contactingly relative to each other.