公开(公告)号：US10923361B2

公开(公告)日：2021-02-16

申请号：US16659012

申请日：2019-10-21

Applicant: ASM IP Holding B.V.

Inventor： Eva E. Tois ,  Hidemi Suemori ,  Viljami J. Pore ,  Suvi P. Haukka ,  Varun Sharma ,  Jan Willem Maes ,  Delphine Longrie ,  Krzysztof Kachel

IPC: H01L21/311 ,  H01L21/02 ,  H01L21/033 ,  H01L21/3213 ,  H01L21/32 ,  C23C16/04 ,  C23C16/455 ,  C23C16/56 ,  H01L21/768

Abstract: Processes are provided herein for deposition of organic films. Organic films can be deposited, including selective deposition on one surface of a substrate relative to a second surface of the substrate. For example, polymer films may be selectively deposited on a first metallic surface relative to a second dielectric surface. Selectivity, as measured by relative thicknesses on the different layers, of above about 50% or even about 90% is achieved. The selectively deposited organic film may be subjected to an etch process to render the process completely selective. Processes are also provided for particular organic film materials, independent of selectivity. Masking applications employing selective organic films are provided. Post-deposition modification of the organic films, such as metallic infiltration and/or carbon removal, is also disclosed.

公开(公告)号：US20200176246A1

公开(公告)日：2020-06-04

申请号：US16206589

申请日：2018-11-30

Applicant: ASM IP Holding B.V.

Inventor： Hannu Huotari ,  Jan Willem Maes

IPC: H01L21/02 ,  H01L21/3213 ,  C23C16/40 ,  C23C16/455

Abstract: A method for forming ultraviolet (UV) radiation responsive metal-oxide containing film is disclosed. The method may include, depositing an UV radiation responsive metal oxide-containing film over a substrate by, heating the substrate to a deposition temperature of less than 400° C., contacting the substrate with a first vapor phase reactant comprising a metal component, a hydrogen component, and a carbon component, and contacting the substrate with a second vapor phase reactant comprising an oxygen containing precursor, wherein regions of the UV radiation responsive metal oxide-containing film have a first etch rate after UV irradiation and regions of the UV radiation responsive metal oxide-containing film not irradiated with UV radiation have a second etch rate, wherein the second etch rate is different from the first etch rate.

公开(公告)号：US10665452B2

公开(公告)日：2020-05-26

申请号：US16018692

申请日：2018-06-26

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  David de Roest ,  Jacob Woodruff ,  Michael Eugene Givens ,  Jan Willem Maes ,  Timothee Blanquart

IPC: H01L21/02 ,  H01L21/265 ,  H01L29/36 ,  H01L29/417 ,  H01L21/225 ,  H01L29/08

Abstract: A method for improving source/drain performance through conformal solid state doping and its resulting device are disclosed. Specifically, the doping takes place through an atomic layer deposition of a dopant layer. Embodiments of the invention may allow for an increased doping layer, improved conformality, and reduced defect formation, in comparison to alternate doping methods, such as ion implantation or epitaxial doping.

公开(公告)号：US10361201B2

公开(公告)日：2019-07-23

申请号：US14997683

申请日：2016-01-18

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Vladimir Machkaoutsan ,  Jan Willem Maes

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/165

Abstract: Semiconductor structures, devices, and methods of forming the structures and device are disclosed. Exemplary structures include multi-gate or FinFET structures that can include both n-channel MOS (NMOS) and p-channel MOS (PMOS) devices to form CMOS structures and devices on a substrate. The devices can be formed using selective epitaxy and shallow trench isolation techniques.

公开(公告)号：US10204782B2

公开(公告)日：2019-02-12

申请号：US15132091

申请日：2016-04-18

Applicant: ASM IP Holding B.V. ,  IMEC VZW

Inventor： Jan Willem Maes ,  Werner Knaepen ,  Roel Gronheid ,  Arjun Singh

IPC: H01L21/33 ,  H01L21/033 ,  G03F7/00 ,  H01L21/02 ,  H01L21/027 ,  H01L21/32

Abstract: A method for forming a film with an annealing step and a deposition step is disclosed. The method comprises an annealing step for inducing self-assembly or alignment within a polymer. The method also comprises a selective deposition step in order to enable selective deposition on a polymer.

公开(公告)号：US10121699B2

公开(公告)日：2018-11-06

申请号：US15432263

申请日：2017-02-14

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L23/532 ,  H01L21/283

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US20180233350A1

公开(公告)日：2018-08-16

申请号：US15892728

申请日：2018-02-09

Applicant: ASM IP HOLDING B.V.

Inventor： Eva E. Tois ,  Suvi P. Haukka ,  Raija H. Matero ,  Elina Färm ,  Delphine Longrie ,  Hidemi Suemori ,  Jan Willem Maes ,  Marko Tuominen ,  Shaoren Deng ,  Ivo Johannes Raaijmakers ,  Andrea Illiberi

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/56 ,  H01L21/768 ,  H01L21/67 ,  H01L23/528 ,  H01L23/532 ,  H01L23/522 ,  H01L23/31

CPC classification number: H01L21/0228 ,  H01L21/02118 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/0272 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/32 ,  H01L21/321 ,  H01L21/56 ,  H01L21/67069 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76877 ,  H01L23/3171 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/53295

Abstract: Methods for selective deposition, and structures thereof, are provided. Material is selectively deposited on a first surface of a substrate relative to a second surface of a different material composition. A passivation layer is selectively formed from vapor phase reactants on the first surface while leaving the second surface without the passivation layer. A layer of interest is selectively deposited from vapor phase reactants on the second surface relative to the passivation layer. The first surface can be metallic while the second surface is dielectric, or the second surface is dielectric while the second surface is metallic. Accordingly, material, such as a dielectric, can be selectively deposited on either metallic or dielectric surfaces relative to the other type of surface using techniques described herein. Techniques and resultant structures are also disclosed for control of positioning and shape of layer edges relative to boundaries between underlying disparate materials.

公开(公告)号：US20180190793A1

公开(公告)日：2018-07-05

申请号：US15394571

申请日：2016-12-29

Applicant: ASM IP Holding B.V.

Inventor： Harald Profijt ,  Qi Xie ,  Jan Willem Maes ,  David Kohen

IPC: H01L29/66 ,  H01L29/161 ,  H01L29/10 ,  H01L29/06 ,  H01L21/223

CPC classification number: H01L21/225 ,  H01L21/223 ,  H01L21/2251 ,  H01L21/2256 ,  H01L21/385 ,  H01L21/76858 ,  H01L29/0676 ,  H01L29/1033 ,  H01L29/161 ,  H01L29/66666

Abstract: In some embodiments, a compound semiconductor is formed by diffusion of semiconductor species from a source semiconductor layer into semiconductor material in a substrate. The source semiconductor layer may be an amorphous or polycrystalline structure, and provides a source of semiconductor species for later diffusion into the other semiconductor material. Advantageously, such a semiconductor layer may be more conformal than an epitaxially grown, crystalline semiconductor layer. As a result, this more conformal semiconductor layer acts as a uniform source of the semiconductor species for diffusion into the semiconductor material in the substrate. In some embodiments, an interlayer is formed between the source semiconductor layer and the substrate, and then the interlayer is trimmed before depositing the source semiconductor layer. In some other embodiments, the source semiconductor layer is deposited directly on the substrate, and has an amorphous or polycrystalline structure.

公开(公告)号：US20180122709A1

公开(公告)日：2018-05-03

申请号：US15796593

申请日：2017-10-27

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Michael Eugen Givens ,  Petri Raisanen ,  Jan Willem Maes

IPC: H01L21/8238 ,  H01L29/49 ,  H01L21/3213 ,  H01L21/285 ,  H01L27/092 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L21/823842 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/28088 ,  H01L21/28556 ,  H01L21/32133 ,  H01L21/823821 ,  H01L21/823857 ,  H01L27/092 ,  H01L27/0924 ,  H01L29/42364 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/78

Abstract: Methods for forming a semiconductor device and related semiconductor device structures are provided. In some embodiments, methods may include forming an NMOS gate dielectric and a PMOS gate dielectric over a substrate and forming a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. In some embodiments, methods may also include, removing the first work function metal over the NMOS gate dielectric and forming a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. In some embodiments, related semiconductor device structures may include an NMOS gate dielectric and a PMOS gate dielectric disposed over a semiconductor substrate. A PMOS gate electrode may be disposed over the PMOS gate dielectric and the PMOS gate electrode may include a first work function metal disposed over the PMOS gate dielectric and a second work function metal disposed over the first work function metal. A NMOS gate electrode may be disposed over the NMOS gate dielectric and the NMOS gate electrode may include the second work function metal.

公开(公告)号：US20170352550A1

公开(公告)日：2017-12-07

申请号：US15486124

申请日：2017-04-12

Applicant: ASM IP Holding B.V.

Inventor： Eva E. Tois ,  Hidemi Suemori ,  Viljami J. Pore ,  Suvi P. Haukka ,  Varun Sharma ,  Jan Willem Maes ,  Delphine Longrie ,  Krzysztof Kachel

IPC: H01L21/311 ,  C23C16/455 ,  C23C16/04 ,  C23C16/56 ,  H01L21/768 ,  H01L21/02

CPC classification number: H01L21/31144 ,  C23C16/04 ,  C23C16/45553 ,  C23C16/56 ,  H01L21/02118 ,  H01L21/02178 ,  H01L21/02186 ,  H01L21/0228 ,  H01L21/0337 ,  H01L21/31138 ,  H01L21/32 ,  H01L21/32139 ,  H01L21/76834

Abstract: Processes are provided herein for deposition of organic films. Organic films can be deposited, including selective deposition on one surface of a substrate relative to a second surface of the substrate. For example, polymer films may be selectively deposited on a first metallic surface relative to a second dielectric surface. Selectivity, as measured by relative thicknesses on the different layers, of above about 50% or even about 90% is achieved. The selectively deposited organic film may be subjected to an etch process to render the process completely selective. Processes are also provided for particular organic film materials, independent of selectivity. Masking applications employing selective organic films are provided. Post-deposition modification of the organic films, such as metallic infiltration and/or carbon removal, is also disclosed.