公开(公告)号：US20240329344A1

公开(公告)日：2024-10-03

申请号：US18129769

申请日：2023-03-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jung Jui KANG ,  Chiu-Wen LEE ,  Shih-Yuan SUN ,  Chang Chi LEE ,  Hung-Chun KUO ,  Chun-Yen TING

IPC: G02B6/43 ,  G02B6/42 ,  H01L25/16

CPC classification number: G02B6/43 ,  G02B6/4206 ,  G02B6/4239 ,  H01L25/167

Abstract: Semiconductor packages and methods for manufacturing the semiconductor packages are provided. The semiconductor package includes a first electronic element disposed over a first substrate; a second electronic element disposed over a second substrate spaced apart from the first substrate; and a first interconnection element connected to the first electronic element and the second electronic element. The first electronic element extends beyond an edge of the first substrate. The second electronic element extends beyond an edge of the second substrate and towards the first electronic element. The first interconnection element is configured to optically transmit a signal between the first electronic element and the second electronic element.

公开(公告)号：US20240155758A1

公开(公告)日：2024-05-09

申请号：US17981338

申请日：2022-11-04

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien Lin CHANG CHIEN ,  Yuan-Chun TAI ,  Yu Hsin CHANG CHIEN ,  Chiu-Wen LEE ,  Chang Chi LEE

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K1/0271 ,  H05K1/11 ,  H05K1/182 ,  H05K2201/068 ,  H05K2201/1003

Abstract: An electronic device is provided. The electronic device includes a first dielectric layer, an electronic element, an encapsulant, and a second dielectric layer. The first dielectric layer has a first coefficient of thermal expansion (CTE). The electronic element is disposed over the first dielectric layer. The encapsulant encapsulates the electronic element and has a second CTE. The second dielectric layer is disposed over the encapsulant and having a third CTE. The second CTE ranges between the first CTE and the third CTE.

公开(公告)号：US20230420418A1

公开(公告)日：2023-12-28

申请号：US17846642

申请日：2022-06-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun-Yen TING ,  Pao-Nan LEE ,  Jung Jui KANG ,  Chang Chi LEE

IPC: H01L25/065

CPC classification number: H01L25/0657 ,  H01L2225/06544 ,  H01L2225/06558 ,  H01L2225/06589

Abstract: An electronic device is provided. The electronic device includes a first die and a second die. The second die is disposed over the first die. A backside surface of the second die faces a backside surface of the first die. An active surface of the second die is configured to receive a first power. The second die is configured to provide the first die with a second power through the backside surface of the second die and the backside surface of the first die.

公开(公告)号：US20230268293A1

公开(公告)日：2023-08-24

申请号：US17676093

申请日：2022-02-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Pao-Nan LEE ,  Chen-Chao WANG ,  Chang Chi LEE

IPC: H01L23/64 ,  H01L25/065

CPC classification number: H01L23/645 ,  H01L25/0657 ,  H01L25/0652

Abstract: An electronic device is disclosed. The electronic device includes a first electronic component and a power regulating structure configured to provide a first power to the first electronic component. The power regulating structure includes a first component and a second component at least partially overlapped with the first component from a top view.

公开(公告)号：US20250029970A1

公开(公告)日：2025-01-23

申请号：US18223526

申请日：2023-07-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jung Jui KANG ,  Chang Chi LEE ,  Hung-Chun KUO ,  Chun-Yen TING

IPC: H01L25/18 ,  H10B80/00

Abstract: The present disclosure provides an electronic device, which includes a circuit structure, a processing component, a first storage unit, and a second storage unit. The processing component is disposed over the circuit structure. The first storage unit is supported by the circuit structure, and electrically connected to the processing component. The second storage unit is disposed under the circuit structure and electrically connected to the processing component via the circuit structure.

公开(公告)号：US20240130043A1

公开(公告)日：2024-04-18

申请号：US17966701

申请日：2022-10-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun-Yen TING ,  Pao-Nan LEE ,  Hung-Chun KUO ,  Jung Jui KANG ,  Chang Chi LEE

IPC: H05K1/14

CPC classification number: H05K1/141

Abstract: An electronic device is disclosed. The electronic device includes a system board and a first set of electronic devices disposed over the system board. Each of the first set of electronic devices comprises a processing unit and a carrier carrying the processing unit. The electronic device also includes a first interconnection structure electrically connected with the processing unit through the carrier and configured to receive a first power from a first power supply unit and to transmit the first power to the processing unit.

公开(公告)号：US20240030135A1

公开(公告)日：2024-01-25

申请号：US17870674

申请日：2022-07-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Pao-Nan LEE ,  Jung Jui KANG ,  Chang Chi LEE

IPC: H01L23/528 ,  H01L23/48 ,  H01L23/522 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/5286 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/49816 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/48091 ,  H01L2224/48248 ,  H01L2224/73265 ,  H01L2224/16227

Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first region and a second region distinct from the first region. The electronic device also includes an electronic component covering the first region and at least partially exposing the second region. The electronic device also includes a first power regulating element in the second region of the carrier and a second power regulating element. The second power regulating element is disposed adjacent to the first power regulating element and electrically connected to the electronic component through the first power regulating element to provide a first power path.

公开(公告)号：US20240023239A1

公开(公告)日：2024-01-18

申请号：US17865380

申请日：2022-07-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jung Jui KANG ,  Chang Chi LEE

IPC: H05K1/02 ,  H05K1/14

CPC classification number: H05K1/0296 ,  H05K1/144 ,  H05K1/145 ,  H05K2201/10159 ,  H05K2201/10378 ,  H05K2201/042

Abstract: An electronic device is disclosed. The electronic device includes a carrier, a computing element disposed over the carrier, and a first data storage element disposed over the carrier and electrically connected with the computing element through the carrier. The computing element is configured to receive a first power provided from the first data storage element.

公开(公告)号：US20240008184A1

公开(公告)日：2024-01-04

申请号：US17856898

申请日：2022-07-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chiung-Ying KUO ,  Hung-Chun KUO ,  Pao-Nan LEE ,  Jung Jui KANG ,  Chang Chi LEE

IPC: H05K1/18 ,  H05K1/02

CPC classification number: H05K1/181 ,  H05K1/0216 ,  H05K1/028

Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first portion, a second portion over the first portion, and a third portion connecting the first portion and the second portion. The electronic device also includes a first electronic component disposed between the first portion and the second portion. An active surface of the first electronic component faces the second portion. The electronic device also includes a second electronic component disposed over the second portion. The first portion is configured to transmit a first power signal to a backside surface of the first electronic component opposite to the active surface.

公开(公告)号：US20230207524A1

公开(公告)日：2023-06-29

申请号：US18115743

申请日：2023-02-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang Chi LEE ,  Jung Jui KANG ,  Chiu-Wen LEE ,  Li Chieh CHEN

IPC: H01L25/065 ,  H01L23/538

CPC classification number: H01L25/0655 ,  H01L23/5387 ,  H01L23/5386 ,  H01L23/5385

Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.