公开(公告)号：US20220104354A1

公开(公告)日：2022-03-31

申请号：US17227458

申请日：2021-04-12

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H05K1/11 ,  H05K1/18

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. The chip is mounted on the chip mounting area, a space exists between a first bump and a second bump of the chip, and there are no additional bumps between the first and second bumps. A first inner lead, a second inner lead, a first dummy lead and a second dummy lead of the circuit layer are located on the chip mounting area. The first and second inner leads are electrically connected to the first and second bumps respectively. The first dummy lead is connected to the first inner lead and adjacent to the first bump, and the second dummy lead is connected to the second inner lead and adjacent to the second bump.

公开(公告)号：US20220037238A1

公开(公告)日：2022-02-03

申请号：US17227470

申请日：2021-04-12

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H01L23/498 ,  H05K1/18 ,  H01L23/00

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure.

公开(公告)号：US20210265255A1

公开(公告)日：2021-08-26

申请号：US17038237

申请日：2020-09-30

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H01L23/498 ,  H01L23/00

Abstract: A flip chip interconnection including a circuit board is disclosed. The circuit board includes a substrate, inner leads, a T-shaped circuit line and a dummy pattern. The inner leads, the T-shaped circuit line and the dummy pattern are located on an inner bonding area of the substrate. The T-shaped circuit line includes a main segment, a branch segment and a connection segment that is connected to the main segment and the branch segment. The main segment and the branch segment are extended along a lateral direction and a longitudinal direction, respectively. The dummy pattern is located between the connection segment and the inner leads.

公开(公告)号：US20210257287A1

公开(公告)日：2021-08-19

申请号：US16986415

申请日：2020-08-06

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Yu-Chen Ma ,  Hsin-Hao Huang ,  Wen-Fu Chou ,  Gwo-Shyan Sheu

IPC: H01L23/498 ,  H01L23/00

Abstract: A chip package includes a circuit board, a chip and an underfill. The circuit board includes a substrate, first circuit lines and second circuit lines. Each of the first circuit lines includes an inner lead and a first line fragment that are disposed on a chip mounting area and an underfill covering area of the substrate, respectively. The second circuit lines are disposed on the chip mounting area and not located between the adjacent inner leads so as to form a wider space between the adjacent first line fragments. The wider space enables the underfill to flow to between the circuit board and the chip and prevents air bubbles from being embedded in the underfill filled between the circuit board and the chip.