公开(公告)号：US4564390A

公开(公告)日：1986-01-14

申请号：US684775

申请日：1984-12-21

Applicant: Debabrata Gupta ,  John C. Yarwood

Inventor： Debabrata Gupta ,  John C. Yarwood

IPC: C22B9/05 ,  C21C5/56 ,  C21C7/00 ,  C21C7/068 ,  C21C7/072 ,  C21C7/076 ,  C22B9/10

CPC classification number: C21C7/0037 ,  C21C7/0685 ,  C21C5/567 ,  C21C7/068 ,  C21C7/072

Abstract: A process is disclosed for reducing the carbon content of a melt of metal or metal alloy, carbon, and at least one strong oxide forming metallic alloying element from an initial value of about 0.1 wt % carbon to a final value of not less than about 0.003 wt % carbon. The process consists of contacting the melt with a reactive oxide of the metallic alloying element and simultaneously stirring the melt with an inert gas.

Abstract translation: 公开了一种方法，用于从约0.1重量％碳的初始值降低金属或金属合金，碳和至少一种形成强氧化物的金属合金元素的熔体的碳含量，最终值不小于约0.003 重量％的碳。 该方法包括使熔体与金属合金元素的反应性氧化物接触并同时用惰性气体搅拌熔体。

公开(公告)号：US07005727B2

公开(公告)日：2006-02-28

申请号：US10234030

申请日：2002-09-03

Applicant: Hamid Azimi ,  Debabrata Gupta ,  Saliya Witharana

Inventor： Hamid Azimi ,  Debabrata Gupta ,  Saliya Witharana

IPC: H01L23/58

CPC classification number: H01L21/485 ,  H01L23/5382 ,  H01L2924/0002 ,  Y10S257/91 ,  H01L2924/00

Abstract: A programmable package with a fuse embedded therein, and fabrication method are provided. The fuse has first and second terminal ends joined by a central portion defining a fusible link. The ends include a portion of the first and second conductive layers, the central portion including a portion of the first conductive layer. The first layer may be electroless copper and the second layer may be electrolytic copper. The fuse may have a dog-bone or a bow tie shape. The method includes providing a substrate with a dielectric layer, and forming the fuse by depositing first conductive layer, forming and patterning second conductive layer over a portion of the first layer, and patterning first layer to form interconnects between areas of the second layer.

Abstract translation: 提供了嵌入其中的熔丝的可编程封装以及制造方法。 保险丝具有由限定可熔连接件的中心部分连接的第一和第二端部。 端部包括第一和第二导电层的一部分，中心部分包​​括第一导电层的一部分。 第一层可以是无电解铜，第二层可以是电解铜。 保险丝可能具有狗骨或蝴蝶结的形状。 该方法包括：提供具有电介质层的衬底，以及通过沉积第一导电层形成熔丝，在第一层的一部分上形成和图案化第二导电层，以及图案化第一层以在第二层的区域之间形成互连。

公开(公告)号：US06775150B1

公开(公告)日：2004-08-10

申请号：US09650566

申请日：2000-08-30

Applicant: Kishore K. Chakravorty ,  Paul H. Wermer ,  David G. Figueroa ,  Debabrata Gupta

Inventor： Kishore K. Chakravorty ,  Paul H. Wermer ,  David G. Figueroa ,  Debabrata Gupta

IPC: H05K118

CPC classification number: H01L23/49822 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/15174 ,  H01L2924/3011 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/0306 ,  H05K1/141 ,  H05K1/162 ,  H05K1/185 ,  H05K3/4605 ,  H05K3/4688 ,  H05K2201/0154 ,  H05K2201/09309 ,  H05K2201/10674 ,  H01L2224/0401

Abstract: To reduce switching noise, the power supply terminals of an integrated circuit die are coupled to the respective terminals of at least one embedded capacitor in a multilayer ceramic/organic hybrid substrate. In one embodiment, a ceramic portion of the substrate includes at least one capacitor formed of a high permittivity layer sandwiched between conductive planes. An organic portion of the substrate includes suitable routing and fan-out of power and signal conductors. The organic portion includes a build-up of multiple layers of organic material overlying the ceramic portion. Also described are an electronic system, a data processing system, and various methods of manufacture.

Abstract translation: 为了降低开关噪声，集成电路管芯的电源端子耦合到多层陶瓷/有机混合衬底中的至少一个嵌入式电容器的相应端子。 在一个实施例中，衬底的陶瓷部分包括由夹在导电平面之间的高电容率层形成的至少一个电容器。 基板的有机部分包括电源和信号导体的合适布线和扇出。 有机部分包括覆盖陶瓷部分的多层有机材料的堆积。 还描述了电子系统，数据处理系统和各种制造方法。

公开(公告)号：US5567648A

公开(公告)日：1996-10-22

申请号：US552430

申请日：1995-11-03

Applicant: Debabrata Gupta

Inventor： Debabrata Gupta

IPC: H01L21/48 ,  H01L21/60 ,  H05K3/34 ,  H01L21/283

CPC classification number: H01L24/11 ,  H01L21/4853 ,  H05K3/3478 ,  H01L2224/13099 ,  H01L2924/00013 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H05K2201/0305 ,  H05K2201/10424 ,  H05K2201/10734 ,  H05K2203/043

Abstract: A method for forming conductive interconnect bumps, such as solder bumps, on bond pads on a substrate. The method includes conductive discs and a connecting member formed between two adjacent conductive discs. The discs and connecting member are then placed over the bond pads and heat is applied so that the conductive discs and the connecting member combine to form isolated interconnect bumps. A polymer backsheet is used for support.

Abstract translation: 一种用于在衬底上的接合焊盘上形成诸如焊料凸块的导电互连凸块的方法。 该方法包括导电盘和形成在两个相邻导电盘之间的连接构件。 然后将盘和连接构件放置在接合焊盘上，并施加热量，使得导电盘和连接构件组合形成隔离的互连凸块。 聚合物底片用于支撑。

公开(公告)号：US5198963A

公开(公告)日：1993-03-30

申请号：US795440

申请日：1991-11-21

Applicant: Debabrata Gupta ,  James E. Drye

Inventor： Debabrata Gupta ,  James E. Drye

IPC: G01R31/28 ,  H01L21/66 ,  H01L23/538 ,  H01L25/065

CPC classification number: G01R31/2863 ,  G01R31/2886 ,  H01L22/20 ,  H01L23/5385 ,  H01L25/0655 ,  H01L2224/16 ,  H01L2224/24227 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/15192

Abstract: A multi-chip module (26) used to interconnect and house a plurality of integrated circuits (10). The module (26) employs an intermediate structure referred to, herein, as a bridge chip (12). The bridge chip (12) connects the integrated circuit (10) to the module substrate (19). The integrated circuit (10) is attached to the bridge chip (12) and forms a composite structure (18) which can be burned-in and tested as an individual unit. The bridge chip (12) has interconnects to bring out the inputs and outputs of the integrated circuit (10). The composite structure (18) is mounted to the module substrate (19) such that, the integrated circuit (10) has a thermal pathway to the module substrate (19), and the bridge chip (12) connects to the module substrate (19). The module substrate (19) has interconnects to connect the plurality of composite structures (18).

Abstract translation: 用于互连和容纳多个集成电路（10）的多芯片模块（26）。 模块（26）采用这里称为桥芯片（12）的中间结构。 桥芯片（12）将集成电路（10）连接到模块基板（19）。 集成电路（10）附接到桥芯片（12）并形成可以作为单独单元进行燃烧和测试的复合结构（18）。 桥芯片（12）具有互连以便输出集成电路（10）的输入和输出。 复合结构（18）安装到模块基板（19），使得集成电路（10）具有到模块基板（19）的热通路，桥接芯片（12）连接到模块基板（19） ）。 模块基板（19）具有互连以连接多个复合结构（18）。

公开(公告)号：US4773469A

公开(公告)日：1988-09-27

申请号：US150476

申请日：1988-01-26

Applicant: Debabrata Gupta ,  Harvey P. Cheskis

Inventor： Debabrata Gupta ,  Harvey P. Cheskis

IPC: B22D11/047 ,  B22D11/00

CPC classification number: B22D11/0475 ,  B22D11/047

Abstract: An apparatus and process for continuous horizontal casting of an ingot from molten metal. The apparatus comprises a mold for effecting rapid solidification of the molten metal into the ingot. A feed nozzle supplies the molten metal to the mold. Transition structure is disposed between the mold and the feed nozzle for solidifying the molten metal in the transition structure to prevent freeze back in the feed nozzle.

Abstract translation: 用于从熔融金属连续水平铸造锭的设备和方法。 该装置包括用于使熔融金属快速固化到锭中的模具。 进料喷嘴将熔融金属提供给模具。 过渡结构设置在模具和进料喷嘴之间，用于固化过渡结构中的熔融金属，以防止进料喷嘴中的冷凝。