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公开(公告)号：US12242966B2
公开(公告)日：2025-03-04
申请号：US18528935
申请日：2023-12-05
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Sai Rahul Chalamalasetti , Paolo Faraboschi , Martin Foltin , Catherine Graves , Dejan S. Milojicic , John Paul Strachan , Sergey Serebryakov
Abstract: A crossbar array includes a number of memory elements. An analog-to-digital converter (ADC) is electronically coupled to the vector output register. A digital-to-analog converter (DAC) is electronically coupled to the vector input register. A processor is electronically coupled to the ADC and to the DAC. The processor may be configured to determine whether division of input vector data by output vector data from the crossbar array is within a threshold value, and if not within the threshold value, determine changed data values as between the output vector data and the input vector data, and write the changed data values to the memory elements of the crossbar array.
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公开(公告)号：US20240112029A1
公开(公告)日：2024-04-04
申请号：US18528935
申请日：2023-12-05
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Sai Rahul Chalamalasetti , Paolo Faraboschi , Martin Foltin , Catherine Graves , Dejan S. Milojicic , John Paul Strachan , Sergey Serebryakov
CPC classification number: G06N3/08 , G11C13/0069 , G11C2213/77
Abstract: A crossbar array includes a number of memory elements. An analog-to-digital converter (ADC) is electronically coupled to the vector output register. A digital-to-analog converter (DAC) is electronically coupled to the vector input register. A processor is electronically coupled to the ADC and to the DAC. The processor may be configured to determine whether division of input vector data by output vector data from the crossbar array is within a threshold value, and if not within the threshold value, determine changed data values as between the output vector data and the input vector data, and write the changed data values to the memory elements of the crossbar array.
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公开(公告)号：US11804859B2
公开(公告)日：2023-10-31
申请号：US17580146
申请日：2022-01-20
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： John Paul Strachan , Can Li , Catherine Graves
CPC classification number: H03M13/6597 , G11C13/004 , H03M13/1575 , G11C13/0069 , G11C27/005 , H03M13/1177
Abstract: An analog error correction circuit is disclosed that implements an analog error correction code. The analog circuit includes a crossbar array of memristors or other non-volatile tunable resistive memory devices. The crossbar array includes a first crossbar array portion programmed with values of a target computation matrix and a second crossbar array portion programmed with values of an encoder matrix for correcting computation errors in the matrix multiplication of an input vector with the computation matrix. The first and second crossbar array portions share the same row lines and are connected to a third crossbar array portion that is programmed with values of a decoder matrix, thereby enabling single-cycle error detection. A computation error is detected based on output of the decoder matrix circuitry and a location of the error is determined via an inverse matrix multiplication operation whereby the decoder matrix output is fed back to the decoder matrix.
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公开(公告)号：US11763888B1
公开(公告)日：2023-09-19
申请号：US17872923
申请日：2022-07-25
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Giacomo Pedretti , John Moon , Pedro Henrique Rocha Bruel , Catherine Graves
CPC classification number: G11C15/04 , G11C7/16 , G11C16/102 , G11C16/3404
Abstract: Systems and methods provide new circuits that increase aCAM precision by leveraging the concept of range segmenting to representationally store an analog voltage range across multiple aCAM cells/sub-circuits (here the representationally stored analog voltage range may correspond to a word entry). In this way, a circuit of the presently disclosed technology can increase precision (e.g., the number of programmable levels that can be used to store a word entry and/or the number of programmable levels that an input signal can be search against) linearly with each aCAM cell/sub-circuit added to the circuit. Accordingly, circuits of the presently disclosed technology can be used to carry out more complex computations than conventional aCAMs—and thus can be used in a wider range of computational applications.
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15.发明申请公开(公告)号：US20210398574A1
公开(公告)日：2021-12-23
申请号：US16905694
申请日：2020-06-18
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Thomas Van Vaerenbergh , Can Li , Catherine Graves
Abstract: Systems and methods for an optical ternary content addressable memory (TCAM) are provided. The optical TCAM implements a time-division multiplexing (TDM) based encoding scheme to encode each bit position of a search word in the time domain. Each bit position is associated with at least two time slots. The encoded optical signal comprising the search word is routed through one or more modulators configured to represent a respective TCAM stored word. If a mismatch between at least one bit position of the search word and at least one TCAM stored word occurs, a photodetector or photodetector array will detect light.
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Patent Agency Ranking
公开(公告)号：US11057143B1
公开(公告)日：2021-07-06
申请号：US16905674
申请日：2020-06-18
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Thomas Van Vaerenbergh , Can Li , Catherine Graves
Abstract: Systems and methods for an optical ternary content addressable memory (TCAM) is provided. In various embodiments, one or more search words can be encoded in a multi-wavelength input signal. Each bit position associated with a set of wavelengths of the input signal, each wavelength corresponding to a logic value. A plurality of copies of the input signal can be coupled to an optical search engine comprising a plurality of rows of stored words. In various embodiments, the search word may be encoded in the amplitude of a single wavelength. Each bit position can be associated with a set input waveguides, and a logic value can be encoded based on whether amplitude of the associated wavelength is detected on a respective input waveguide of the set of waveguides. A mismatch of at least one bit is indicated if light is detected on an output of the optical TCAM.
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公开(公告)号：US20210201136A1
公开(公告)日：2021-07-01
申请号：US17044633
申请日：2018-04-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Sai Rahul Chalamalasetti , Paolo Faraboschi , Martin Foltin , Catherine Graves , Dejan S. Milojicic , John Paul Strachan , Sergey Serebryakov
Abstract: A crossbar array includes a number of memory elements. An analog-to-digital converter (ADC) is electronically coupled to the vector output register. A digital-to-analog converter (DAC) is electronically coupled to the vector input register. A processor is electronically coupled to the ADC and to the DAC. The processor may be configured to determine whether division of input vector data by output vector data from the crossbar array is within a threshold value, and if not within the threshold value, determine changed data values as between the output vector data and the input vector data, and write the changed data values to the memory elements of the crossbar array.
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18.发明申请公开(公告)号：US20200073755A1
公开(公告)日：2020-03-05
申请号：US16115100
申请日：2018-08-28
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： John Paul Strachan , Catherine Graves , Dejan S. Milojicic , Paolo Faraboschi , Martin Foltin , Sergey Serebryakov
Abstract: A computer system includes multiple memory array components that include respective analog memory arrays which are sequenced to implement a multi-layer process. An error array data structure is obtained for at least a first memory array component, and from which a determination is made as to whether individual nodes (or cells) of the error array data structure are significant. A determination can be made as to any remedial operations that can be performed to mitigate errors of significance.
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公开(公告)号：US20200042287A1
公开(公告)日：2020-02-06
申请号：US16052218
申请日：2018-08-01
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Sai Rahul Chalamalasetti , Paolo Faraboschi , Martin Foltin , Catherine Graves , Dejan S. Milojicic , Sergey Serebryakov , John Paul Strachan
Abstract: Disclosed techniques provide for dynamically changing precision of a multi-stage compute process. For example, changing neural network (NN) parameters on a per-layer basis depending on properties of incoming data streams and per-layer performance of an NN among other considerations. NNs include multiple layers that may each be calculated with a different degree of accuracy and therefore, compute resource overhead (e.g., memory, processor resources, etc.). NNs are usually trained with 32-bit or 16-bit floating-point numbers. Once trained, an NN may be deployed in production. One approach to reduce compute overhead is to reduce parameter precision of NNs to 16 or 8 for deployment. The conversion to an acceptable lower precision is usually determined manually before deployment and precision levels are fixed while deployed. Disclosed techniques and implementations address automatic rather than manual determination or precision levels for different stages and dynamically adjusting precision for each stage at run-time.
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公开(公告)号：US10419346B1
公开(公告)日：2019-09-17
申请号：US15966719
申请日：2018-04-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： John Paul Strachan , Catherine Graves , Suhas Kumar
IPC: H04L9/06 , G06F17/16 , H04L29/06 , H04L12/743 , G11C11/16
Abstract: An input string is mapped to a vector of input voltages. The vector is applied to input rows of a dot product engine having memristor elements at intersections of the input rows and output columns. A hash of the input string is determined based on output of the dot product engine as to which the vector of input voltages have been applied to the input rows thereof. An output column may be selected from output voltages of the columns, and the hash determined from the selected column. The output voltage of a column is equal to a sum of a product of the input voltage in each input row and a value of the memristor element at the intersection of the input row and the column. The hash can be used within a filtering technique applied to the input string, such as in the context of network security.
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