Semiconductor Device Comprising Auxiliary Trench Structures and Integrated Circuit
    11.
    发明申请
    Semiconductor Device Comprising Auxiliary Trench Structures and Integrated Circuit 有权
    包括辅助沟槽结构和集成电路的半导体器件

    公开(公告)号:US20160293752A1

    公开(公告)日:2016-10-06

    申请号:US15082668

    申请日:2016-03-28

    Inventor: Markus Zundel

    Abstract: An embodiment of a semiconductor device comprises a trench transistor cell array in a semiconductor body. The semiconductor device further comprises an edge termination region of the trench transistor cell array. At least two first auxiliary trench structures extend into the semiconductor body from a first side and are consecutively arranged along a lateral direction. The edge termination region is arranged, along the lateral direction, between the trench transistor cell array and the at least two first auxiliary trench structures. First auxiliary electrodes in the at least two first auxiliary trench structures are electrically connected together and electrically decoupled from electrodes in trenches of the trench transistor cell array.

    Abstract translation: 半导体器件的实施例包括半导体本体中的沟槽晶体管单元阵列。 半导体器件还包括沟槽晶体管单元阵列的边缘终端区。 至少两个第一辅助沟槽结构从第一侧延伸到半导体本体中并且沿着横向连续地布置。 边缘终止区沿着横向布置在沟槽晶体管单元阵列和至少两个第一辅助沟槽结构之间。 所述至少两个第一辅助沟槽结构中的第一辅助电极电连接在一起并与沟槽晶体管单元阵列的沟槽中的电极电分离。

    Method for Producing a Controllable Semiconductor Component Having Trenches with Different Widths and Depths
    12.
    发明申请
    Method for Producing a Controllable Semiconductor Component Having Trenches with Different Widths and Depths 有权
    制造具有不同宽度和深度的沟槽的可控半导体部件的方法

    公开(公告)号:US20160284840A1

    公开(公告)日:2016-09-29

    申请号:US15173337

    申请日:2016-06-03

    Abstract: A controllable semiconductor component is produced by providing a semiconductor body with a top side and a bottom side, and forming a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body. In a common process, an oxide layer is formed in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench. The oxide layer is removed from the first trench completely or at least partly such that the semiconductor body has an exposed first surface area arranged in the first trench. An electrically conductive material is filled into the second trench, and the semiconductor body and the oxide layer are partially removed such that the electrically conductive material has an exposed second surface area at the bottom side.

    Abstract translation: 通过提供具有顶侧和底侧的半导体本体,并且形成从顶侧突出到半导体本体中的第一沟槽和从顶侧突出到半导体本体中的第二沟槽来制造可控半导体部件。 在通常的工艺中,在第一沟槽和第二沟槽中形成氧化物层,使得氧化物层填充第一沟槽并使第二沟槽的表面电绝缘。 完全或至少部分地从第一沟槽去除氧化物层,使得半导体主体具有布置在第一沟槽中的暴露的第一表面区域。 将导电材料填充到第二沟槽中,并且半导体本体和氧化物层被部分地去除,使得导电材料在底侧具有暴露的第二表面区域。

    Semiconductor device having areas with different conductivity types and different doping concentrations
    17.
    发明授权
    Semiconductor device having areas with different conductivity types and different doping concentrations 有权
    具有不同导电类型和掺杂浓度不同的区域的半导体器件

    公开(公告)号:US09306011B2

    公开(公告)日:2016-04-05

    申请号:US14049839

    申请日:2013-10-09

    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a plurality of first doping regions of a first doping structure arranged at a main surface of the semiconductor substrate and a plurality of second doping regions of the first doping structure arranged at the main surface of the semiconductor substrate. The first doping regions of the plurality of first doping regions of the first doping structure include dopants of a first conductivity type with different doping concentrations. Further, the second doping regions of the plurality of second doping regions of the first doping structure include dopants of a second conductivity type with different doping concentrations. At least one first doping region of the plurality of first doping regions of the first doping structure partly overlaps at least one second doping region of the plurality of second doping regions of the first doping structure causing an overlap region arranged at the main surface.

    Abstract translation: 半导体器件包括半导体衬底。 半导体衬底包括布置在半导体衬底的主表面上的第一掺杂结构的多个第一掺杂区域和布置在半导体衬底的主表面处的第一掺杂结构的多个第二掺杂区域。 第一掺杂结构的多个第一掺杂区的第一掺杂区包括具有不同掺杂浓度的第一导电类型的掺杂剂。 此外,第一掺杂结构的多个第二掺杂区域的第二掺杂区域包括具有不同掺杂浓度的第二导电类型的掺杂剂。 第一掺杂结构的多个第一掺杂区域中的至少一个第一掺杂区域部分地与第一掺杂结构的多个第二掺杂区域中的至少一个第二掺杂区重叠,导致布置在主表面处的重叠区域。

    Method for operating field-effect transistor, field-effect transistor and circuit configuration
    20.
    发明授权
    Method for operating field-effect transistor, field-effect transistor and circuit configuration 有权
    操作场效应晶体管,场效应晶体管和电路配置的方法

    公开(公告)号:US09184284B2

    公开(公告)日:2015-11-10

    申请号:US13731422

    申请日:2012-12-31

    Abstract: A method for operating a field-effect transistor having a source terminal, a drain terminal, a gate terminal, a drift region and a dielectric region adjoining the drift region, is provided. The method includes: connecting at least one of the drain terminal and the source terminal to a load; applying a sequence of voltage pulses between the gate terminal and the source terminal to repetitively switch the field-effect transistor such that the field-effect transistor is driven in an avalanche mode between the voltage pulses, during the avalanche mode avalanche multiplication occurring in the drift region close to the dielectric region; and applying at least one relaxation pulse to the field-effect transistor to reduce an accumulation of charges in the dielectric region due to hot charge carriers generated in the avalanche mode. Further, a field-effect transistor and a circuit configuration including the field-effect transistor are provided.

    Abstract translation: 提供一种用于操作具有源极端子,漏极端子,栅极端子,漂移区域和与漂移区域相邻的电介质区域的场效应晶体管的方法。 该方法包括:将至少一个漏极端子和源极端子连接到负载; 在栅极端子和源极端子之间施加一系列电压脉冲以重复地切换场效应晶体管,使得场效应晶体管在电压脉冲之间以雪崩模式驱动,在雪崩模式中,在漂移中出现雪崩倍增 靠近电介质区域的区域; 以及向场效应晶体管施加至少一个弛豫脉冲,以减少由于在雪崩模式下产生的热电荷载流子而在电介质区域中的电荷积累。 此外,提供场效应晶体管和包括场效应晶体管的电路配置。

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