公开(公告)号：US20160353293A1

公开(公告)日：2016-12-01

申请号：US15169100

申请日：2016-05-31

Applicant: INTERDIGITAL TECHNOLOGY CORPORATION

Inventor： Allan Y. Tsai ,  William E. Lawton ,  Lakshmi R. Iyer ,  Muhammad U. Fazili ,  Manasa Raghavan

IPC: H04W24/02 ,  H04B17/336 ,  H04L27/34 ,  H04W72/04 ,  H04L27/26 ,  H04W56/00 ,  H04L12/26 ,  H04L5/00 ,  H04W28/02

CPC classification number: H04W24/02 ,  H04B17/336 ,  H04L5/005 ,  H04L7/02 ,  H04L27/265 ,  H04L27/3494 ,  H04M2207/206 ,  H04W28/0236 ,  H04W52/12 ,  H04W56/0035

Abstract: Disclosed are embodiments of apparatuses and methods of use thereof for frequency domain (FD) chip level (CL) equalizers used in wireless receivers. The FD-CL-EQ may further selectively apply a higher order matrix inverse or a lower order matrix inverse in the calculation of a channel estimate based on whether interference is present or not. Further disclosed are embodiments of methods and apparatuses for estimating pilot signal-to-interference ratio (SIR) in the wireless receivers. Further disclosed are methods and apparatuses for compensating for phase errors in received demodulated data symbols to improve performance of the wireless receivers.

Abstract translation: 公开了用于无线接收机中的频域（FD）芯片级（CL）均衡器的装置及其使用方法的实施例。 基于是否存在干扰，FD-CL-EQ还可以在信道估计的计算中进一步选择性地应用更高阶矩阵逆或低阶矩阵逆。 进一步公开的是用于估计无线接收机中的导频信号干扰比（SIR）的方法和装置的实施例。 还公开了用于补偿接收的解调数据符号中的相位误差以提高无线接收机的性能的方法和装置。

公开(公告)号：US10039017B2

公开(公告)日：2018-07-31

申请号：US15845510

申请日：2017-12-18

Applicant: InterDigital Technology Corporation

Inventor： Allan Y. Tsai ,  William E. Lawton ,  Lakshmi R. Iyer ,  Muhammad U. Fazili ,  Manasa Raghavan

IPC: H04W24/02 ,  H04L7/02 ,  H04W52/12 ,  H04L5/00 ,  H04L27/26 ,  H04L27/34 ,  H04B17/336 ,  H04W56/00

CPC classification number: H04W24/02 ,  H04B17/336 ,  H04L5/0051 ,  H04L5/0057 ,  H04L7/02 ,  H04L27/2331 ,  H04L27/265 ,  H04L27/34 ,  H04M2207/206 ,  H04W28/0236 ,  H04W52/12 ,  H04W56/0035

Abstract: Disclosed are embodiments of apparatuses and methods of use thereof for frequency domain (FD) chip level (CL) equalizers used in wireless receivers. The FD-CL-EQ may further selectively apply a higher order matrix inverse or a lower order matrix inverse in the calculation of a channel estimate based on whether interference is present or not. Further disclosed are embodiments of methods and apparatuses for estimating pilot signal-to-interference ratio (SIR) in the wireless receivers. Further disclosed are methods and apparatuses for compensating for phase errors in received demodulated data symbols to improve performance of the wireless receivers.

公开(公告)号：US20180109965A1

公开(公告)日：2018-04-19

申请号：US15845510

申请日：2017-12-18

Applicant: InterDigital Technology Corporation

Inventor： Allan Y. Tsai ,  William E. Lawton ,  Lakshmi R. Iyer ,  Muhammad U. Fazili ,  Manasa Raghavan

IPC: H04W24/02 ,  H04L7/02 ,  H04W52/12 ,  H04W56/00 ,  H04L27/26 ,  H04L27/34 ,  H04B17/336 ,  H04L5/00

CPC classification number: H04W24/02 ,  H04B17/336 ,  H04L5/005 ,  H04L7/02 ,  H04L27/265 ,  H04L27/3494 ,  H04M2207/206 ,  H04W28/0236 ,  H04W52/12 ,  H04W56/0035

Abstract: Disclosed are embodiments of apparatuses and methods of use thereof for frequency domain (FD) chip level (CL) equalizers used in wireless receivers. The FD-CL-EQ may further selectively apply a higher order matrix inverse or a lower order matrix inverse in the calculation of a channel estimate based on whether interference is present or not. Further disclosed are embodiments of methods and apparatuses for estimating pilot signal-to-interference ratio (SIR) in the wireless receivers. Further disclosed are methods and apparatuses for compensating for phase errors in received demodulated data symbols to improve performance of the wireless receivers.

公开(公告)号：US09839046B2

公开(公告)日：2017-12-05

申请号：US15044261

申请日：2016-02-16

Applicant: InterDigital Technology Corporation

Inventor： Kyle Jung-Lin Pan ,  Allan Y. Tsai ,  Guodong Zhang

IPC: H04W72/12 ,  H04W52/08 ,  H04W52/48 ,  H04W52/50 ,  H04W74/08 ,  H04W72/04 ,  H04L1/18 ,  H04W52/24 ,  H04L5/00 ,  H04L5/02 ,  H04L27/26 ,  H04W8/26 ,  H04W52/14 ,  H04W52/16 ,  H04W72/02 ,  H04W74/00

CPC classification number: H04W72/1226 ,  H04L1/188 ,  H04L5/0007 ,  H04L5/0044 ,  H04L5/006 ,  H04L5/023 ,  H04L27/2602 ,  H04W8/26 ,  H04W52/08 ,  H04W52/146 ,  H04W52/16 ,  H04W52/248 ,  H04W52/48 ,  H04W52/50 ,  H04W72/02 ,  H04W72/0406 ,  H04W72/0413 ,  H04W72/042 ,  H04W74/004 ,  H04W74/0833 ,  H04W74/0866

Abstract: A method and apparatus for accessing a contention-based uplink random access channel (RACH) in a single carrier frequency division multiple access (SC-FDMA) system are disclosed. A wireless transmit/receive unit (WTRU) randomly selects a RACH subchannel and a signature among a plurality of available RACH subchannels and signatures. The WTRU transmits a preamble using the selected signature via the selected RACH subchannel at a predetermined or computed transmission power. A base station monitors the RACH to detect the preamble and sends an acquisition indicator (AI) to the WTRU when a signature is detected on the RACH. When receiving a positive acknowledgement, the WTRU sends a message part to the base station. If receiving a negative acknowledgement or no response, the WTRU retransmits the preamble.

公开(公告)号：US20170303147A1

公开(公告)日：2017-10-19

申请号：US15630444

申请日：2017-06-22

Applicant: InterDigital Technology Corporation

Inventor： Allan Y. Tsai ,  William E. Lawton ,  Lakshmi R. Iyer ,  Muhammad U. Fazili ,  Manasa Raghavan

IPC: H04W24/02 ,  H04W56/00 ,  H04L5/00 ,  H04B17/336 ,  H04L27/34 ,  H04L27/26 ,  H04L7/02 ,  H04W52/12

CPC classification number: H04W24/02 ,  H04B17/336 ,  H04L5/005 ,  H04L7/02 ,  H04L27/265 ,  H04L27/3494 ,  H04M2207/206 ,  H04W28/0236 ,  H04W52/12 ,  H04W56/0035

Abstract: Disclosed are embodiments of apparatuses and methods of use thereof for frequency domain (FD) chip level (CL) equalizers used in wireless receivers. The FD-CL-EQ may further selectively apply a higher order matrix inverse or a lower order matrix inverse in the calculation of a channel estimate based on whether interference is present or not. Further disclosed are embodiments of methods and apparatuses for estimating pilot signal-to-interference ratio (SIR) in the wireless receivers. Further disclosed are methods and apparatuses for compensating for phase errors in received demodulated data symbols to improve performance of the wireless receivers.

公开(公告)号：US09693240B2

公开(公告)日：2017-06-27

申请号：US15169100

申请日：2016-05-31

Applicant: INTERDIGITAL TECHNOLOGY CORPORATION

Inventor： Allan Y. Tsai ,  William E. Lawton ,  Lakshmi R. Iyer ,  Muhammad U. Fazili ,  Manasa Raghavan

IPC: H04B17/336 ,  H04W24/02 ,  H04L5/00 ,  H04L27/34 ,  H04W28/02 ,  H04L27/26 ,  H04W56/00 ,  H04W52/12

CPC classification number: H04W24/02 ,  H04B17/336 ,  H04L5/005 ,  H04L7/02 ,  H04L27/265 ,  H04L27/3494 ,  H04M2207/206 ,  H04W28/0236 ,  H04W52/12 ,  H04W56/0035

Abstract: Disclosed are embodiments of apparatuses and methods of use thereof for frequency domain (FD) chip level (CL) equalizers used in wireless receivers. The FD-CL-EQ may further selectively apply a higher order matrix inverse or a lower order matrix inverse in the calculation of a channel estimate based on whether interference is present or not. Further disclosed are embodiments of methods and apparatuses for estimating pilot signal-to-interference ratio (SIR) in the wireless receivers. Further disclosed are methods and apparatuses for compensating for phase errors in received demodulated data symbols to improve performance of the wireless receivers.