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公开(公告)号:US09728627B2
公开(公告)日:2017-08-08
申请号:US14935830
申请日:2015-11-09
Applicant: Infineon Technologies AG
Inventor: Moriz Jelinek , Johannes Georg Laven , Helmut Oefner , Hans-Joachim Schulze , Werner Schustereder
IPC: H01L21/00 , H01L29/739 , H01L29/36 , H01L29/10 , H01L21/324 , H01L21/263 , H01L21/66
Abstract: A method for forming a semiconductor device comprises implanting a defined dose of protons into a semiconductor substrate and tempering the semiconductor substrate according to a defined temperature profile. At least one of the defined dose of protons and the defined temperature profile is selected depending on a carbon-related parameter indicating information on a carbon concentration within at least a part of the semiconductor substrate.
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公开(公告)号:US20170141049A1
公开(公告)日:2017-05-18
申请号:US14945115
申请日:2015-11-18
Applicant: Infineon Technologies AG
Inventor: Helmut Oefner , Hans-Joachim Schulze
IPC: H01L23/00 , H01L21/304 , H01L21/02
CPC classification number: H01L23/562 , H01L21/02021 , H01L21/02035 , H01L21/304
Abstract: A wafer that includes a front surface, a back surface, and an edge between the front surface and the back surface having a curved edge profile between an edge of the front surface and a side face of the edge of the wafer. The edge profile includes a first convex curve that joins the edge of the front surface, a second convex curve that joins the side face, and an intermediate concave curve that joins the first convex curve and the second convex curve.
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公开(公告)号:US09559020B2
公开(公告)日:2017-01-31
申请号:US14963855
申请日:2015-12-09
Applicant: Infineon Technologies AG
Inventor: Reinhard Ploss , Helmut Oefner , Hans-Joachim Schulze
IPC: H01L29/12 , H01L21/66 , H01L21/265 , H01L21/324 , H01L21/261 , H01L21/263 , H01L29/36 , H01L29/66 , H01L29/78 , H01L29/32 , H01L29/739 , H01L29/74 , H01L29/861 , H01L29/872
CPC classification number: H01L22/20 , H01L21/261 , H01L21/263 , H01L21/265 , H01L21/26513 , H01L21/324 , H01L22/12 , H01L22/14 , H01L29/32 , H01L29/36 , H01L29/66325 , H01L29/66348 , H01L29/66734 , H01L29/7397 , H01L29/74 , H01L29/7813 , H01L29/8611 , H01L29/872
Abstract: A method for treating a semiconductor wafer having a basic doping is disclosed. The method includes determining a doping concentration of the basic doping, and adapting the basic doping of the semiconductor wafer by postdoping. The postdoping includes at least one of the following methods: a proton implantation and a subsequent thermal process for producing hydrogen induced donors. In this case, at least one of the following parameters is dependent on the determined doping concentration of the basic doping: an implantation dose of the proton implantation, and a temperature of the thermal process.
Abstract translation: 公开了一种用于处理具有基本掺杂的半导体晶片的方法。 该方法包括确定基本掺杂的掺杂浓度,以及通过后掺杂来适应半导体晶片的基本掺杂。 后掺杂包括以下方法中的至少一种:质子注入和随后的用于产生氢诱导供体的热处理。 在这种情况下,以下参数中的至少一个取决于所确定的碱性掺杂的掺杂浓度:质子注入的注入剂量和热处理的温度。
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14.
公开(公告)号:US20160064206A1
公开(公告)日:2016-03-03
申请号:US14473890
申请日:2014-08-29
Applicant: Infineon Technologies AG
Inventor: Hans-Joachim Schulze , Helmut Oefner
IPC: H01L21/02 , H01L21/66 , H01L29/16 , H01L29/36 , H01L21/324 , H01L21/265
CPC classification number: H01L21/02008 , H01L21/0203 , H01L21/02436 , H01L21/26506 , H01L21/3225 , H01L21/324 , H01L22/12 , H01L22/20 , H01L22/26 , H01L29/16 , H01L29/36
Abstract: A method for processing a semiconductor body is disclosed. In an embodiment, the method includes reducing an oxygen concentration in a silicon wafer in a first region adjoining a first surface of the silicon wafer by a first heat treatment, creating vacancies in a crystal lattice of the wafer at least in a second region adjoining the first region by implanting particles via the first surface into the wafer and forming oxygen precipitates in the second region by a second heat treatment.
Abstract translation: 公开了一种用于处理半导体本体的方法。 在一个实施例中,该方法包括通过第一热处理在与硅晶片的第一表面邻接的第一区域中减少硅晶片中的氧浓度,至少在邻近第二区域的第二区域中产生晶片的晶格中的空位 第一区域,通过经由第一表面将颗粒注入晶片中,并通过第二热处理在第二区域中形成氧沉淀物。
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公开(公告)号:US12211703B2
公开(公告)日:2025-01-28
申请号:US18236434
申请日:2023-08-22
Applicant: Infineon Technologies AG
Inventor: Hans-Joachim Schulze , Alexander Breymesser , Bernhard Goller , Matthias Kuenle , Helmut Oefner , Francisco Javier Santos Rodriguez , Stephan Voss
IPC: H01L21/324 , H01L21/265 , H01L21/78
Abstract: A method of forming a semiconductor device includes: forming a first semiconductor layer on a semiconductor substrate, the first semiconductor layer being of the same dopant type as the semiconductor substrate, the first semiconductor layer having a higher dopant concentration than the semiconductor substrate; increasing the porosity of the first semiconductor layer; first annealing the first semiconductor layer in an atmosphere including an inert gas; forming a second semiconductor layer on the first semiconductor layer; and separating the second semiconductor layer from the semiconductor substrate by splitting within the first semiconductor layer. Additional methods of forming a semiconductor device are described.
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公开(公告)号:US09972488B2
公开(公告)日:2018-05-15
申请号:US15066262
申请日:2016-03-10
Applicant: Infineon Technologies AG
Inventor: Hans-Joachim Schulze , Helmut Oefner , Johannes Baumgartl
IPC: H01L21/02
CPC classification number: H01L21/0243 , H01L21/02381 , H01L21/0242 , H01L21/02532 , H01L21/02658
Abstract: A method of reducing defects in an epitaxial layer. The method includes forming one or more barrier structures within a peripheral edge region of a wafer substrate, and forming an epitaxial layer over a surface of the wafer substrate.
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公开(公告)号:US09934988B2
公开(公告)日:2018-04-03
申请号:US15379243
申请日:2016-12-14
Applicant: Infineon Technologies AG
Inventor: Werner Schustereder , Helmut Oefner , Hans-Joachim Schulze , Sandeep Walia
IPC: H01L21/322 , H01L21/02 , H01L21/223 , H01L21/306 , H01L21/265
CPC classification number: H01L21/3225 , H01L21/02532 , H01L21/02592 , H01L21/02598 , H01L21/2236 , H01L21/26506 , H01L21/30604
Abstract: Disclosed is a method for processing a semiconductor wafer. The method includes forming an oxygen containing region in the semiconductor wafer, wherein forming the oxygen containing region includes introducing oxygen via a first surface into the semiconductor wafer. The method further includes creating vacancies at least in the oxygen containing region and annealing at least the oxygen containing region in an annealing process so as to form oxygen precipitates.
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18.
公开(公告)号:US09779931B2
公开(公告)日:2017-10-03
申请号:US14878362
申请日:2015-10-08
Applicant: Infineon Technologies AG
Inventor: Johannes Freund , Helmut Oefner , Hans-Joachim Schulze
IPC: H01L21/00 , H01L21/02 , H01L21/265 , H01L21/66 , H01L23/544 , H01L21/263 , H01L21/324
CPC classification number: H01L21/02008 , C30B33/00 , H01L21/263 , H01L21/26533 , H01L21/324 , H01L22/12 , H01L22/20 , H01L23/544 , H01L2223/54413 , H01L2223/54426 , H01L2223/54433 , H01L2223/54493
Abstract: An embodiment of a method of manufacturing semiconductor wafers comprises determining at least one material characteristic for at least two positions of a semiconductor ingot. A notch or a flat is formed in a semiconductor ingot extending along an axial direction. A plurality of markings is formed in the semiconductor ingot. At least some of the plurality of markings at different positions along the axial direction are distinguishable from each other by a characteristic feature set depending on the at least one material characteristic. The semiconductor ingot is then sliced into semiconductor wafers.
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公开(公告)号:US20170263440A1
公开(公告)日:2017-09-14
申请号:US15066262
申请日:2016-03-10
Applicant: Infineon Technologies AG
Inventor: Hans-Joachim Schulze , Helmut Oefner , Johannes Baumgartl
IPC: H01L21/02
CPC classification number: H01L21/0243 , H01L21/02381 , H01L21/0242 , H01L21/02532 , H01L21/02658
Abstract: A method of reducing defects in an epitaxial layer. The method includes forming one or more barrier structures within a peripheral edge region of a wafer substrate, and forming an epitaxial layer over a surface of the wafer substrate.
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公开(公告)号:US09728395B2
公开(公告)日:2017-08-08
申请号:US14867839
申请日:2015-09-28
Applicant: INFINEON TECHNOLOGIES AG
Inventor: Helmut Oefner , Nico Caspary , Mohammad Momeni , Reinhard Ploss , Francisco Javier Santos Rodriguez , Hans-Joachim Schulze
IPC: H01L21/02 , H01L21/268 , H01L21/324 , H01L29/66 , H01L21/18 , H01L21/225 , H01L21/28 , H01L21/322
CPC classification number: H01L29/7393 , H01L21/02002 , H01L21/02005 , H01L21/02008 , H01L21/0201 , H01L21/02016 , H01L21/187 , H01L21/2257 , H01L21/268 , H01L21/28238 , H01L21/3221 , H01L21/3225 , H01L21/324 , H01L21/3242 , H01L21/76256 , H01L29/1095 , H01L29/32 , H01L29/66325 , H01L29/66348 , H01L29/66734 , H01L29/7395 , H01L29/7397 , H01L29/7813
Abstract: A method for manufacturing a substrate wafer 100 includes providing a device wafer (110) having a first side (111) and a second side (112); subjecting the device wafer (110) to a first high temperature process for reducing the oxygen content of the device wafer (110) at least in a region (112a) at the second side (112); bonding the second side (112) of the device wafer (110) to a first side (121) of a carrier wafer (120) to form a substrate wafer (100); processing the first side (101) of the substrate wafer (100) to reduce the thickness of the device wafer (110); subjecting the substrate wafer (100) to a second high temperature process for reducing the oxygen content at least of the device wafer (110); and at least partially integrating at least one semiconductor component (140) into the device wafer (110) after the second high temperature process.
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