公开(公告)号：US20170338153A1

公开(公告)日：2017-11-23

申请号：US15596961

申请日：2017-05-16

Applicant: Infineon Technologies AG

Inventor： Johannes Baumgartl ,  Manfred Engelhardt ,  Oliver Hellmund ,  Iris Moder ,  Ingo Muri

IPC: H01L21/78 ,  H01L29/06 ,  H01L21/306 ,  H01L21/304 ,  H01L21/683 ,  H01L21/311 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L21/78 ,  H01L21/02013 ,  H01L21/304 ,  H01L21/3043 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/6835 ,  H01L21/76895 ,  H01L21/82 ,  H01L23/528 ,  H01L29/0657 ,  H01L29/0834 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/861 ,  H01L2221/68327

Abstract: A method for forming a plurality of semiconductor devices includes forming a plurality of trenches extending from a first lateral surface of a semiconductor wafer towards a second lateral surface of the semiconductor wafer. The method further includes filling a portion of the plurality of trenches with filler material. The method further includes thinning the semiconductor wafer from the second lateral surface of the semiconductor wafer to form a thinned semiconductor wafer. The method further includes forming a back side metallization layer structure on a plurality of semiconductor chip regions of the semiconductor wafer after thinning the semiconductor wafer. The method further includes removing a part of the filler material from the plurality of trenches after forming the back side metallization layer structure to obtain the plurality of semiconductor devices.

公开(公告)号：US20160322306A1

公开(公告)日：2016-11-03

申请号：US14698639

申请日：2015-04-28

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Gudrun Stranzl ,  Manfred Engelhardt ,  Martin Zgaga

IPC: H01L23/544 ,  G06K7/14 ,  H01L21/67 ,  H01L21/78 ,  H01L21/3065

CPC classification number: H01L23/544 ,  H01L21/30655 ,  H01L21/78 ,  H01L2223/54413 ,  H01L2223/54433 ,  H01L2223/5446 ,  H01L2223/54473

Abstract: The description discloses a method for use in manufacturing integrated circuit chips. The method comprises providing a wafer having a plurality of integrated circuits each provided in an separate active areas, and, for each active area, outside the active area, providing a code pattern that is associated with the integrated circuit. A computer-readable medium is also disclosed. Further, a manufacturing apparatus configured to receive a wafer and to remove material from the wafer so as to provide a scribe line to the wafer formed as a trench for use in separation of the wafer into dies is also disclosed. The description also discloses a wafer, an integrated circuit chip die substrate originating from a wafer of origin and carrying an integrated circuit, and an integrated circuit chip.

Abstract translation: 该说明书公开了一种用于制造集成电路芯片的方法。 该方法包括提供具有多个集成电路的晶片，每个集成电路分别设置在单独的有源区域中，并且对于每个有源区域，在有源区域外部，提供与集成电路相关联的代码图案。 还公开了一种计算机可读介质。 此外，还公开了一种制造装置，其被配置为接收晶片并从晶片去除材料，以便为形成为用于将晶片分离成模具的沟槽形成的晶片提供划线。 该说明书还公开了一种晶片，源自原始晶片的集成电路芯片芯片基板和承载集成电路，以及集成电路芯片。

公开(公告)号：US20160293474A1

公开(公告)日：2016-10-06

申请号：US15184804

申请日：2016-06-16

Applicant: Infineon Technologies AG

Inventor： Manfred Engelhardt

IPC: H01L21/687 ,  H01L21/683 ,  C23C16/50 ,  H01L21/02 ,  C23C14/34 ,  H01L21/67 ,  H01L21/3065

CPC classification number: H01L21/68785 ,  C23C14/34 ,  C23C16/4401 ,  C23C16/4583 ,  C23C16/50 ,  C23C16/5096 ,  H01L21/02274 ,  H01L21/3065 ,  H01L21/67069 ,  H01L21/6838

Abstract: The semiconductor processing system includes a reactor chamber that has an upper wall and a lower wall. A hold member is disposed in the reactor chamber to hold a semiconductor substrate in such a way that it faces the lower wall of the reactor chamber.

Abstract translation: 半导体处理系统包括具有上壁和下壁的反应室。 保持构件设置在反应器室中以使其面向反应器室的下壁的方式保持半导体衬底。

公开(公告)号：US20160284990A1

公开(公告)日：2016-09-29

申请号：US15181733

申请日：2016-06-14

Applicant: Infineon Technologies AG

Inventor： Carsten von Koblinski ,  Volker Strutz ,  Manfred Engelhardt

IPC: H01L43/14 ,  H01L27/22 ,  H01L21/78 ,  H01L27/12 ,  H01L43/04 ,  H01L43/06

CPC classification number: H01L43/14 ,  H01L21/78 ,  H01L21/84 ,  H01L23/3121 ,  H01L23/3171 ,  H01L23/3178 ,  H01L23/3185 ,  H01L24/06 ,  H01L27/12 ,  H01L27/22 ,  H01L43/04 ,  H01L43/065 ,  H01L43/12 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: In one embodiment, a method of forming a current sensor device includes forming a device region comprising a magnetic sensor within and/or over a semiconductor substrate. The device region is formed adjacent a front side of the semiconductor substrate. The back side of the semiconductor substrate is attached over an insulating substrate, where the back side is opposite the front side. Sidewalls of the semiconductor substrate are exposed by dicing the semiconductor substrate from the front side without completely dicing the insulating substrate. An isolation liner is formed over all of the exposed sidewalls of the semiconductor substrate. The isolation liner and the insulating substrate include a different material. The method further includes separating the insulating substrate to form diced chips, removing at least a portion of the isolation liner from over a top surface of the device region, and forming contacts over the top surface of the device region.

Abstract translation: 在一个实施例中，形成电流传感器装置的方法包括在半导体衬底之内和/或之上形成包括磁传感器的器件区域。 器件区域邻近半导体衬底的前侧形成。 半导体衬底的背面安装在绝缘衬底上，其中背面与正面相反。 半导体衬底的侧壁通过从前侧切割半导体衬底而没有完全切割绝缘衬底来暴露。 隔离衬垫形成在半导体衬底的所有暴露的侧壁上。 隔离衬垫和绝缘衬底包括不同的材料。 该方法还包括分离绝缘基板以形成切割的芯片，从隔离元件区域的顶表面上去除隔离衬垫的至少一部分，以及在器件区域的顶表面上形成触点。

公开(公告)号：US09219011B2

公开(公告)日：2015-12-22

申请号：US14013822

申请日：2013-08-29

Applicant: Infineon Technologies AG

Inventor： Manfred Engelhardt ,  Gudrun Stranzl ,  Markus Zundel ,  Hubert Maier

IPC: H01L21/00 ,  H01L21/30 ,  H01L21/46 ,  H01L21/78 ,  B28D5/00

CPC classification number: H01J37/32009 ,  B28D5/00 ,  H01J2237/334 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834

Abstract: Various methods and apparatuses are provided relating to separation of a substrate into a plurality of parts. For example, first a partial separation is performed and then the partially separated substrate is completely separated into a plurality of parts.

Abstract translation: 提供了关于将基板分离成多个部件的各种方法和装置。 例如，首先进行部分分离，然后将部分分离的基板完全分离成多个部分。

公开(公告)号：US20150183631A1

公开(公告)日：2015-07-02

申请号：US14644937

申请日：2015-03-11

Applicant: Infineon Technologies AG

Inventor： Manfred Engelhardt ,  Martin Zgaga

IPC: B81B3/00

CPC classification number: B81B3/001 ,  B81B3/0051 ,  B81C1/00531 ,  B81C1/00626 ,  B81C2201/0112 ,  B81C2201/0132 ,  H01L21/30655

Abstract: According to an embodiment of a semiconductor device, the semiconductor device includes a micro-mechanical structure and a semiconductor material arranged over the micro-mechanical structure. A side surface of the semiconductor material includes a first region and a second region. The first region has an undulation, and the second region is a peripheral region of the side surface and decreases towards the micro-mechanical structure.

Abstract translation: 根据半导体器件的实施例，半导体器件包括布置在微机械结构上的微机械结构和半导体材料。 半导体材料的侧表面包括第一区域和第二区域。 第一区域具有起伏，第二区域是侧表面的周边区域，朝向微机械结构减小。

公开(公告)号：US20140151854A1

公开(公告)日：2014-06-05

申请号：US13691475

申请日：2012-11-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Manfred Engelhardt ,  Frank Hoffmann

IPC: H01L21/02 ,  H01L29/06

CPC classification number: H01L21/0203 ,  H01L21/304 ,  H01L21/7806 ,  H01L29/06 ,  H01L29/1608

Abstract: A method for separating a layer from a substrate. The method includes providing a plurality of trenches extending from a first main surface of the substrate into the substrate. A heat treatment of the substrate is performed such that edges of the trenches grow together at the first main surface to form a closed layer at the first main surface, wherein lower portions of the trenches form one or more cavities within the substrate. After that the closed layer is separated from the substrate along the one or more cavities.

Abstract translation: 一种从基板分离层的方法。 该方法包括提供从衬底的第一主表面延伸到衬底中的多个沟槽。 进行基板的热处理，使得沟槽的边缘在第一主表面一起生长以在第一主表面处形成封闭层，其中沟槽的下部在基板内形成一个或多个空腔。 之后，封闭层沿着一个或多个空腔与衬底分离。

公开(公告)号：US11149351B2

公开(公告)日：2021-10-19

申请号：US15700232

申请日：2017-09-11

Applicant: Infineon Technologies AG

Inventor： Matthias Kuenle ,  Johannes Baumgartl ,  Manfred Engelhardt ,  Christian Illemann ,  Francisco Javier Santos Rodriguez ,  Olaf Storbeck

IPC: C23C16/54 ,  C23C16/455 ,  C30B25/12 ,  C23C16/458 ,  C23C16/46 ,  C23C16/02 ,  C30B25/10 ,  C30B25/14 ,  H01L21/02 ,  C30B29/06 ,  C30B29/36

Abstract: A CVD reactor, including a deposition chamber housing a first susceptor and a second susceptor, the first susceptor having a cavity for receiving a first substrate, the first substrate having a front surface and a back surface, the second susceptor having a cavity for receiving a second substrate, the second substrate having a front surface and a back surface, and the first susceptor and the second susceptor are disposed so that the front surface of the first substrate is opposite to the front surface of the second substrate thereby forming a portion of a gas flow channel.

公开(公告)号：US10672716B2

公开(公告)日：2020-06-02

申请号：US16029934

申请日：2018-07-09

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Gudrun Stranzl ,  Manfred Engelhardt ,  Martin Zgaga

IPC: H01L23/544 ,  H01L21/78 ,  H01L21/3065

Abstract: An integrated circuit substrate and a method for manufacturing the same are disclosed. In an embodiment a method includes providing a wafer having a plurality of active areas, each active area being provided in a separate die area and for each active area, providing a code pattern outside the active area, the code pattern being associated with the die area.

公开(公告)号：US10032670B2

公开(公告)日：2018-07-24

申请号：US15182387

申请日：2016-06-14

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Manfred Engelhardt ,  Gudrun Stranzl

IPC: H01L21/00 ,  H01L21/78 ,  H01L21/3065 ,  H01L21/67 ,  H01L29/16 ,  H01L23/495 ,  H01J37/32

Abstract: A method of forming a semiconductor device includes forming an active region in a first side of a silicon carbide substrate, the silicon carbide substrate having a second side opposite the first side and forming a contact pad at the first side. The contact pad is coupled to the active region. The method further includes forming an etch stop layer over the contact pad and plasma dicing the silicon carbide substrate from the second side. The plasma dicing etches through the silicon carbide substrate and stops on the etch stop layer. The diced silicon carbide substrate is held together by the etch stop layer. The diced silicon carbide substrate is attached on a carrier. The diced silicon carbide substrate is separated into silicon carbide dies by cleaving the etch stop layer.